From 51d8b25984381c8fe51d3f63186edf7d3ef0576c Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Thu, 4 May 2023 00:39:54 +0200 Subject: [PATCH] soc/intel/spr: Fix copy paste issue in error messages The commit a0b199c6b483 ("soc/intel/xeon_sp/spr: Add soc set_cmos_mrc_cold_boot_flag") introduced a copy-paste issue in two error messages. The error messages should mention the Intel platform SPR instead of CPX. Fix that. Change-Id: I4de61ec2cf9fbd98263a7a7a588938d548148656 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/74956 Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) Reviewed-by: Johnny Lin Reviewed-by: Lean Sheng Tan --- src/soc/intel/xeon_sp/spr/include/soc/soc_util.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/intel/xeon_sp/spr/include/soc/soc_util.h b/src/soc/intel/xeon_sp/spr/include/soc/soc_util.h index e1ed41458b..2028dfafe2 100644 --- a/src/soc/intel/xeon_sp/spr/include/soc/soc_util.h +++ b/src/soc/intel/xeon_sp/spr/include/soc/soc_util.h @@ -18,10 +18,10 @@ #if CONFIG(USE_OPTION_TABLE) #include "option_table.h" #if CMOS_VSTART_mrc_status != CMOS_OFFSET_MRC_STATUS * 8 -#error "CMOS start for CPX-SP MRC status byte is not correct, check your cmos.layout" +#error "CMOS start for SPR-SP MRC status byte is not correct, check your cmos.layout" #endif #if CMOS_VLEN_mrc_status != 8 -#error "CMOS length for CPX-SP MRC status byte is not correct, check your cmos.layout" +#error "CMOS length for SPR-SP MRC status byte is not correct, check your cmos.layout" #endif #endif