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mb/google/volteer/variants/eldrid: Configure DP_HPD as PAD_NC 

GPP_A19(DP_HPD1) and GPP_A20(DP_HPD2) were configured native function
(NF1) without internal pull-down which wrongly presents HPD interrupts.
This change configures GPP_A19 and GPP_A20 to be no connection and
disables DdiPort1Hpd and DdiPort2Hpd.

BUG=b:165893624, b:168090618

Signed-off-by: nick_xr_chen <nick_xr_chen@wistron.corp-partner.google.com>
Change-Id: I31b25be1c9248debf855435c7b688b358e2cd57e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45246
Reviewed-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
nick_xr_chen 2020-09-10 18:53:31 +08:00 committed by Tim Wawrzynczak
parent 72fc9a3e26
commit 5200063114
2 changed files with 4 additions and 2 deletions
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4
src/mainboard/google/volteer/variants/eldrid/gpio.c
View File

@ -19,9 +19,9 @@ static const struct pad_config override_gpio_table[] = {
/* A16 : USB_OC3# ==> USB_C0_OC_ODL */
PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1),
/* A19 : DDSP_HPD1 ==> USB_C0_DP_HPD */
PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1),
PAD_NC(GPP_A19, NONE),
/* A20 : DDSP_HPD2 ==> USB_C1_DP_HPD */
PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1),
PAD_NC(GPP_A20, NONE),
/* A21 : DDPC_CTRCLK ==> EN_FP_PWR */
PAD_CFG_GPO(GPP_A21, 1, DEEP),
/* A23 : I2S1_SCLK ==> I2S1_SPKR_SCLK */

2
src/mainboard/google/volteer/variants/eldrid/overridetree.cb
View File

@ -1,6 +1,8 @@
chip soc/intel/tigerlake
register "TcssAuxOri" = "1"
register "DdiPort1Hpd" = "0"
register "DdiPort2Hpd" = "0"
register "IomTypeCPortPadCfg[0]" = "0x090E000A"
register "IomTypeCPortPadCfg[1]" = "0x090E000D"
#+-------------------+---------------------------+