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mb/google/rambi: update GPIO, RAM config for clapper 

When upstreamed, GPIO and RAM config for clapper variant was taken
from an older branch, leading some boards to fail to boot.

Update based on chromium branch firmware-clapper-5216.199.B,
commit 362d845 [baytrail: implement baytrail technical advisory 556192]

Change-Id: I099ee2cd0833e4b9ab093663c4549c79ec044127
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34760
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Matt DeVillier 2019-08-06 13:19:26 -05:00 committed by Patrick Georgi
parent 38a1286111
commit 52009a9d16
4 changed files with 46 additions and 40 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/mainboard/google/rambi/variants/clapper/Makefile.inc
View File

@ -23,12 +23,16 @@ SPD_BIN = $(obj)/spd.bin
# 0b011 - 2GiB total - 2 x 1GiB Hynix H5TC2G63FFR-PBA 1600MHz
# 0b100 - 2GiB total - 1 x 2GiB Micron MT41K256M16HA-125:E 1600MHz
# 0b101 - 2GiB total - 1 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz
# 0b110 - 4GiB total - 2 x 2GiB Samsung K4B4G1646Q-HYK0 1600MHz
# 0b111 - 2GiB total - 1 x 2GiB Samsung K4B4G1646Q-HYK0 1600MHz
SPD_SOURCES = micron_2GiB_dimm_MT41K256M16HA-125
SPD_SOURCES += hynix_2GiB_dimm_H5TC4G63AFR-PBA
SPD_SOURCES += micron_1GiB_dimm_MT41K128M16JT-125
SPD_SOURCES += hynix_1GiB_dimm_H5TC2G63FFR-PBA
SPD_SOURCES += micron_2GiB_dimm_MT41K256M16HA-125
SPD_SOURCES += hynix_2GiB_dimm_H5TC4G63AFR-PBA
SPD_SOURCES += samsung_2GiB_dimm_K4B4G1646Q-HYK0
SPD_SOURCES += samsung_2GiB_dimm_K4B4G1646Q-HYK0
SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex)

50
src/mainboard/google/rambi/variants/clapper/gpio.c
View File

@ -28,7 +28,7 @@ static const struct soc_gpio_map gpncore_gpio_map[] = {
GPIO_FUNC2, /* S0_NC06 - EDP_HPD_L */
GPIO_INPUT, /* S0_NC07 - DDI1_DDCDATA - STRAP */
GPIO_NC, /* S0_NC08 - NC */
GPIO_FUNC2, /* S0_NC09 - SOC_DISP_ON_C */
GPIO_OUT_HIGH, /* S0_NC09 - SOC_DISP_ON_C */
GPIO_FUNC2, /* S0_NC10 - SOC_EDP_BLON_C */
GPIO_FUNC2, /* S0_NC11 - SOC_DPST_PWM_C */
GPIO_NC, /* S0_NC12 - NC */
@ -58,7 +58,7 @@ static const struct soc_gpio_map gpscore_gpio_map[] = {
GPIO_FUNC1, /* S0-SC004 - PCIE_CLKREQ_WLAN# */
GPIO_NC, /* S0-SC005 - PCIE_CLKREQ_LAN# (NC) */
GPIO_NC, /* S0-SC006 - PCIE_CLKREQ3# (NC) */
GPIO_FUNC(2, PULL_DISABLE, 10K), /* S0-SC007 - SD3_WP external pull */
GPIO_NC, /* S0-SC007 - SD3_WP external pull (NC) */
GPIO_NC, /* S0-SC008 - ACZ_RST# (NC) */
GPIO_NC, /* S0-SC009 - ACZ_SYNC (NC) */
GPIO_NC, /* S0-SC010 - ACZ_BCLK (NC) */
@ -84,15 +84,15 @@ static const struct soc_gpio_map gpscore_gpio_map[] = {
GPIO_NC, /* S0-SC030 - NC */
GPIO_NC, /* S0-SC031 - NC */
GPIO_NC, /* S0-SC032 - NC */
GPIO_FUNC(1, PULL_DOWN, 20K), /* S0-SC033 - SD3_CLK */
GPIO_FUNC(1, PULL_UP, 20K), /* S0-SC034 - SD3_D0 */
GPIO_FUNC(1, PULL_UP, 20K), /* S0-SC035 - SD3_D1 */
GPIO_FUNC(1, PULL_UP, 20K), /* S0-SC036 - SD3_D2 */
GPIO_FUNC(1, PULL_UP, 20K), /* S0-SC037 - SD3_D3 */
GPIO_FUNC(1, PULL_UP, 20K), /* S0-SC038 - SD3_CD# */
GPIO_FUNC(1, PULL_UP, 20K), /* S0-SC039 - SD3_CMD */
GPIO_NC, /* S0-SC040 - SDMMC3_1P8_EN - TP3 */
GPIO_FUNC(1, PULL_UP, 20K), /* S0-SC041 - SDIO3_PWR_EN# */
GPIO_NC, /* S0-SC033 - SD3_CLK (NC) */
GPIO_NC, /* S0-SC034 - SD3_D0 (NC) */
GPIO_NC, /* S0-SC035 - SD3_D1 (NC) */
GPIO_NC, /* S0-SC036 - SD3_D2 (NC) */
GPIO_NC, /* S0-SC037 - SD3_D3 (NC) */
GPIO_NC, /* S0-SC038 - SD3_CD# (NC) */
GPIO_NC, /* S0-SC039 - SD3_CMD (NC) */
GPIO_NC, /* S0-SC040 - SDMMC3_1P8_EN - TP3 (NC) */
GPIO_NC, /* S0-SC041 - SDIO3_PWR_EN# (NC) */
GPIO_FUNC1, /* S0-SC042 - LPC_LAD0 */
GPIO_FUNC1, /* S0-SC043 - LPC-LAD1 */
GPIO_FUNC1, /* S0-SC044 - LPC_LAD2 */
@ -117,11 +117,11 @@ static const struct soc_gpio_map gpscore_gpio_map[] = {
GPIO_FUNC1, /* S0-SC063 - I2S_LRCLK */
GPIO_FUNC1, /* S0-SC064 - I2S_DIN */
GPIO_FUNC1, /* S0-SC065 - I2S_DOUT */
GPIO_FUNC1, /* S0-SC066 - SIO_SPI_CS# */
GPIO_FUNC1, /* S0-SC067 - SIO_SPI_MISO */
GPIO_FUNC1, /* S0-SC068 - SIO_SPI_MOSI */
GPIO_FUNC1, /* S0-SC069 - SIO_SPI_CLK */
GPIO_INPUT, /* S0-SC070 - ALS_INT_L - INT */
GPIO_NC, /* S0-SC066 - SIO_SPI_CS# (NC) */
GPIO_NC, /* S0-SC067 - SIO_SPI_MISO (NC) */
GPIO_NC, /* S0-SC068 - SIO_SPI_MOSI (NC) */
GPIO_NC, /* S0-SC069 - SIO_SPI_CLK (NC) */
GPIO_NC, /* S0-SC070 - ALS_INT_L - INT (NC) */
GPIO_NC, /* S0-SC071 - NC */
GPIO_DIRQ, /* S0-SC072 - TOUCH_INT_L_DX */
GPIO_NC, /* S0-SC073 - NC */
@ -137,8 +137,8 @@ static const struct soc_gpio_map gpscore_gpio_map[] = {
GPIO_NC, /* S0-SC083 - NC */
GPIO_NC, /* S0-SC084 - NC */
GPIO_NC, /* S0-SC085 - NC */
GPIO_FUNC1, /* S0-SC086 - I2C_4_SDA */
GPIO_FUNC1, /* S0-SC087 - I2C_4_SCL */
GPIO_NC, /* S0-SC086 - NC */
GPIO_NC, /* S0-SC087 - NC */
GPIO_FUNC1, /* S0-SC088 - I2C_5_SDA */
GPIO_FUNC1, /* S0-SC089 - I2C_5_SCL */
GPIO_NC, /* S0-SC090 - NC */
@ -158,16 +158,16 @@ static const struct soc_gpio_map gpscore_gpio_map[] = {
/* SSUS GPIOs */
static const struct soc_gpio_map gpssus_gpio_map[] = {
GPIO_ACPI_SCI, /* S500 - PCH_WAKE# */
GPIO_FUNC6, /* S501 - TRACKPAD_INT# - INT */
GPIO_FUNC6, /* S502 - TOUCH_INT# - INT */
GPIO_ACPI_WAKE, /* S500 - PCH_WAKE# */
GPIO_ACPI_WAKE, /* S501 - TRACKPAD_INT# - INT */
GPIO_ACPI_WAKE, /* S502 - TOUCH_INT# - INT */
GPIO_FUNC6, /* S503 - LTE_WAKE_L# - INT */
GPIO_NC, /* S504 - SOC_JTAG2_TDO (NC/PU) */
GPIO_FUNC1, /* S505 - SUS_CLK_WLAN (NC) */
GPIO_INPUT_PU, /* S506 - PCH_SPI_WP */
GPIO_ACPI_SMI, /* S507 - SOC_KBC_SMI - INT */
GPIO_NC, /* S508 - NC */
GPIO_NC, /* S509 - MUX_AUD_INT1# (NC) */
GPIO_DIRQ, /* S509 - MUX_AUD_INT1# */
GPIO_OUT_HIGH, /* S510 - WIFI_DISABLE_L */
GPIO_FUNC0, /* S511 - SUSPWRDNACK */
GPIO_FUNC0, /* S512 - WIFI_SUSCLK */
@ -195,9 +195,9 @@ static const struct soc_gpio_map gpssus_gpio_map[] = {
GPIO_NC, /* S534 - NC */
GPIO_OUT_HIGH, /* S535 - LTE_DISABLE_L */
GPIO_NC, /* S536 - NC */
GPIO_FUNC0, /* S537 - RAM_ID0 */
GPIO_FUNC0, /* S538 - RAM_ID1 */
GPIO_FUNC0, /* S539 - RAM_ID2 */
GPIO_INPUT, /* S537 - RAM_ID0 */
GPIO_INPUT, /* S538 - RAM_ID1 */
GPIO_INPUT, /* S539 - RAM_ID2 */
GPIO_NC, /* S540 - NC */
GPIO_NC, /* S541 - NC */
GPIO_NC, /* S542 - NC */

4
src/mainboard/google/rambi/variants/clapper/include/variant/onboard.h
View File

@ -23,13 +23,13 @@
#define BOARD_TRACKPAD_NAME "trackpad"
#define BOARD_TRACKPAD_IRQ GPIO_S0_DED_IRQ(TPAD_IRQ_OFFSET)
#define BOARD_TRACKPAD_WAKE_GPIO 1 /* GPSSUS1 */
#define BOARD_TRACKPAD_WAKE_GPIO ACPI_ENABLE_WAKE_SUS_GPIO(1)
#define BOARD_TRACKPAD_I2C_BUS 0
#define BOARD_TRACKPAD_I2C_ADDR 0x15
#define BOARD_TOUCHSCREEN_NAME "touchscreen"
#define BOARD_TOUCHSCREEN_IRQ GPIO_S0_DED_IRQ(TOUCH_IRQ_OFFSET)
#define BOARD_TOUCHSCREEN_WAKE_GPIO 2 /* GPSSUS2 */
#define BOARD_TOUCHSCREEN_WAKE_GPIO ACPI_ENABLE_WAKE_SUS_GPIO(2)
#define BOARD_TOUCHSCREEN_I2C_BUS 5
#define BOARD_TOUCHSCREEN_I2C_ADDR 0x4a

4
src/mainboard/google/rambi/variants/clapper/include/variant/variant.h
View File

@ -24,10 +24,12 @@
* 0b011 - 2GiB total - 2 x 1GiB Hynix H5TC2G63FFR-PBA 1600MHz
* 0b100 - 2GiB total - 1 x 2GiB Micron MT41K256M16HA-125:E 1600MHz
* 0b101 - 2GiB total - 1 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz
* 0b110 - 4GiB total - 2 x 2GiB Samsung K4B4G1646Q-HYK0 1600MHz
* 0b111 - 2GiB total - 1 x 2GiB Samsung K4B4G1646Q-HYK0 1600MHz
*/
static const uint32_t dual_channel_config =
(1 << 0) | (1 << 1) | (1 << 2) | (1 << 3);
(1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 6);
#define SPD_SIZE 256
#define GPIO_SSUS_37_PAD 57