diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c
index 72dd8b42c3..3017357235 100644
--- a/src/mainboard/lenovo/t60/romstage.c
+++ b/src/mainboard/lenovo/t60/romstage.c
@@ -100,12 +100,10 @@ static void rcba_config(void)
 	RCBA32(FD) |= FD_INTLAN;
 
 	/* Set up I/O Trap #0 for 0xfe00 (SMIC) */
-	RCBA32(IOTR0) = 0x0000fe01;
-	RCBA32(IOTR0+4) = 0x00020001;
+	RCBA64(IOTR0) = 0x000200010000fe01ULL;
 
 	/* Set up I/O Trap #3 for 0x800-0x80c (Trap) */
-	RCBA32(IOTR3) = 0x000c0801;
-	RCBA32(IOTR3+4) = 0x000200f0;
+	RCBA64(IOTR3) = 0x000200f0000c0801ULL;
 }
 
 static void early_ich7_init(void)
diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c
index 8943f975af..6f66c88c96 100644
--- a/src/mainboard/lenovo/x60/romstage.c
+++ b/src/mainboard/lenovo/x60/romstage.c
@@ -99,12 +99,10 @@ static void rcba_config(void)
 	RCBA32(FD) |= FD_INTLAN;
 
 	/* Set up I/O Trap #0 for 0xfe00 (SMIC) */
-	RCBA32(IOTR0) = 0x0000fe01;
-	RCBA32(IOTR0+4) = 0x00020001;
+	RCBA64(IOTR0) = 0x000200010000fe01ULL;
 
 	/* Set up I/O Trap #3 for 0x800-0x80c (Trap) */
-	RCBA32(IOTR3) = 0x000c0801;
-	RCBA32(IOTR3+4) = 0x000200f0;
+	RCBA64(IOTR3) = 0x000200f0000c0801ULL;
 }
 
 static void early_ich7_init(void)
diff --git a/src/mainboard/lenovo/z61t/romstage.c b/src/mainboard/lenovo/z61t/romstage.c
index 966d0e5759..6eceaeb77d 100644
--- a/src/mainboard/lenovo/z61t/romstage.c
+++ b/src/mainboard/lenovo/z61t/romstage.c
@@ -100,12 +100,10 @@ static void rcba_config(void)
 	RCBA32(FD) |= FD_INTLAN;
 
 	/* Set up I/O Trap #0 for 0xfe00 (SMIC) */
-	RCBA32(IOTR0) = 0x0000fe01;
-	RCBA32(IOTR0+4) = 0x00020001;
+	RCBA64(IOTR0) = 0x000200010000fe01ULL;
 
 	/* Set up I/O Trap #3 for 0x800-0x80c (Trap) */
-	RCBA32(IOTR3) = 0x000c0801;
-	RCBA32(IOTR3+4) = 0x000200f0;
+	RCBA64(IOTR3) = 0x000200f0000c0801ULL;
 }
 
 static void early_ich7_init(void)
diff --git a/src/southbridge/intel/common/rcba.h b/src/southbridge/intel/common/rcba.h
index e7482f9bdb..225cd26086 100644
--- a/src/southbridge/intel/common/rcba.h
+++ b/src/southbridge/intel/common/rcba.h
@@ -28,6 +28,7 @@
 #define RCBA8(x) (*((volatile u8 *)(DEFAULT_RCBA + x)))
 #define RCBA16(x) (*((volatile u16 *)(DEFAULT_RCBA + x)))
 #define RCBA32(x) (*((volatile u32 *)(DEFAULT_RCBA + x)))
+#define RCBA64(x) (*((volatile u64 *)(DEFAULT_RCBA + x)))
 
 #define RCBA_AND_OR(bits, x, and, or) \
 	(RCBA##bits(x) = ((RCBA##bits(x) & (and)) | (or)))