soc/intel/tigerlake: Add definition for PMC EPOC

The PMC EPOC register indicates which external crystal oscillator is
connected to the PCH.  This frequency is important for determining the
IP clock of internal PCH devices.

Add definitions that allow this register to be read and extract the
crystal frequency, and a helper function to extract and return this
as the defined enum.

BUG=b:146482091

Signed-off-by: Duncan Laurie <dlaurie@google.com>
Change-Id: I959fe507f3dbf93b6176b333a9e725ed09f56328
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40887
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Duncan Laurie 2020-04-29 12:19:50 -07:00 committed by Duncan Laurie
parent 47b5a9820f
commit 526880754f
2 changed files with 31 additions and 0 deletions

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@ -101,6 +101,30 @@ extern struct device_operations pmc_ops;
#define PCH2CPU_TPR_CFG_LOCK (1 << 31) #define PCH2CPU_TPR_CFG_LOCK (1 << 31)
#define PCH2CPU_TT_EN (1 << 26) #define PCH2CPU_TT_EN (1 << 26)
#define PCH_PMC_EPOC 0x18EC
#define PCH_EPOC_2LM(__epoc) ((__epoc) & 0x1)
/* XTAL frequency in bits 21, 20, 17 */
#define PCH_EPOC_XTAL_FREQ(__epoc) ((((__epoc) >> 19) & 0x6) | ((__epoc) >> 17 & 0x1))
/**
* enum pch_pmc_xtal - External crystal oscillator frequency.
* @XTAL_24_MHZ: 24 MHz external crystal.
* @XTAL_19_2_MHZ: 19.2 MHz external crystal.
* @XTAL_38_4_MHZ: 38.4 MHz external crystal.
*/
enum pch_pmc_xtal {
XTAL_24_MHZ,
XTAL_19_2_MHZ,
XTAL_38_4_MHZ,
};
/**
* pmc_get_xtal_freq() - Return frequency of external oscillator.
*
* Return &enum pch_pmc_xtal corredsponding to frequency returned by PMC.
*/
enum pch_pmc_xtal pmc_get_xtal_freq(void);
#define PCH_PWRM_ACPI_TMR_CTL 0x18FC #define PCH_PWRM_ACPI_TMR_CTL 0x18FC
#define GPIO_GPE_CFG 0x1920 #define GPIO_GPE_CFG 0x1920
#define GPE0_DWX_MASK 0xf #define GPE0_DWX_MASK 0xf

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@ -17,6 +17,13 @@
#include <soc/pm.h> #include <soc/pm.h>
#include <soc/soc_chip.h> #include <soc/soc_chip.h>
enum pch_pmc_xtal pmc_get_xtal_freq(void)
{
uint8_t *const pmcbase = pmc_mmio_regs();
return PCH_EPOC_XTAL_FREQ(read32(pmcbase + PCH_PMC_EPOC));
}
static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable) static void config_deep_sX(uint32_t offset, uint32_t mask, int sx, int enable)
{ {
uint32_t reg; uint32_t reg;