spi_flash: Move spi flash opcodes to spi_flash.h

BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully

Change-Id: I3b6656923bb312de470da43a23f66f350e1cebc7
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17680
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/include/spi-generic.h

@@ -20,10 +20,6 @@
 
 /* Controller-specific definitions: */
 
-/* SPI opcodes */
-#define SPI_OPCODE_WREN 0x06
-#define SPI_OPCODE_FAST_READ 0x0b
-
 /*-----------------------------------------------------------------------
  * Representation of a SPI slave, i.e. what we're communicating with.
  *

src/include/spi_flash.h

@@ -19,6 +19,10 @@
 #include <stddef.h>
 #include <boot/coreboot_tables.h>
 
+/* SPI Flash opcodes */
+#define SPI_OPCODE_WREN 0x06
+#define SPI_OPCODE_FAST_READ 0x0b
+
 struct spi_flash {
 	struct spi_slave *spi;
 	const char *name;

src/soc/intel/baytrail/spi.c

@@ -21,6 +21,7 @@
 #include <arch/io.h>
 #include <console/console.h>
 #include <device/pci_ids.h>
+#include <spi_flash.h>
 #include <spi-generic.h>
 
 #include <soc/lpc.h>

src/soc/intel/braswell/spi.c

@@ -22,6 +22,7 @@
 #include <rules.h>
 #include <soc/lpc.h>
 #include <soc/pci_devs.h>
+#include <spi_flash.h>
 #include <spi-generic.h>
 #include <stdint.h>
 #include <stdlib.h>

src/soc/intel/broadwell/spi.c

@@ -20,6 +20,7 @@
 #include <arch/io.h>
 #include <console/console.h>
 #include <device/pci_ids.h>
+#include <spi_flash.h>
 #include <spi-generic.h>
 #include <soc/pci_devs.h>
 #include <soc/rcba.h>

src/soc/intel/fsp_baytrail/spi.c

@@ -22,6 +22,7 @@
 #include <arch/io.h>
 #include <console/console.h>
 #include <device/pci_ids.h>
+#include <spi_flash.h>
 #include <spi-generic.h>
 
 #include <soc/lpc.h>

src/southbridge/intel/fsp_rangeley/spi.c

@@ -22,6 +22,7 @@
 #include <console/console.h>
 #include <device/pci_ids.h>
 
+#include <spi_flash.h>
 #include <spi-generic.h>
 
 static int ich_status_poll(u16 bitmask, int wait_til_set);