soc/cavium/cn81xx: Fix minor things

* Move cbmem.c to cn81xx folder
* Store CBMEM below 4 GiB
* Make sure CBMEM doesn't overlap with ATF scratchpad
* Fix ATF scratchpad not marked as reserved due to wrong calculation
* The scratchpad is the last 1 MiB at the end of DRAM.

Tested on Cavium CN81xx EVB:
The ATF scratchpad is now marked reserved and the configuration tables
are located below 4 GiB. Linux still boots.

Change-Id: Ibbc8b586f04bd6867c045f5546b32a77c057ac74
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/27955
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Rudolph 2018-08-08 12:46:18 +02:00 committed by Philipp Deppenwiese
parent eead87961f
commit 52acef175e
4 changed files with 8 additions and 14 deletions

View File

@ -39,16 +39,11 @@ romstage-y += timer.c
romstage-y += spi.c
romstage-y += uart.c
romstage-$(CONFIG_DRIVERS_UART) += uart.c
romstage-< += cpu.c
romstage-y += cbmem.c
romstage-y += sdram.c
romstage-y += mmu.c
romstage-y += ../common/cbmem.c
# BDK coreboot interface
romstage-y += ../common/bdk-coreboot.c
################################################################################
# ramstage
@ -64,12 +59,10 @@ ramstage-y += soc.c
ramstage-y += cpu.c
ramstage-y += cpu_secondary.S
ramstage-y += ecam0.c
ramstage-y += cbmem.c
ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c
# BDK coreboot interface
ramstage-y += ../common/bdk-coreboot.c
BL31_MAKEARGS += PLAT=t81 M0_CROSS_COMPILE="$(CROSS_COMPILE_arm)" ENABLE_SPE_FOR_LOWER_ELS=0
CPPFLAGS_common += -Isrc/soc/cavium/cn81xx/include

View File

@ -21,6 +21,7 @@
void *cbmem_top(void)
{
return (void *)min((uintptr_t)_dram + sdram_size_mb() * MiB,
MAX_DRAM_ADDRESS);
/* Make sure not to overlap with reserved ATF scratchpad */
return (void *)min((uintptr_t)_dram + (sdram_size_mb() - 1) * MiB,
4ULL * GiB);
}

View File

@ -309,7 +309,8 @@ void bootmem_platform_add_ranges(void)
BM_MEM_RESERVED);
/* Scratchpad for ATF SATA quirks */
bootmem_add_range(sdram_size_mb() * KiB, 1 * MiB, BM_MEM_RESERVED);
bootmem_add_range((sdram_size_mb() - 1) * MiB, 1 * MiB,
BM_MEM_RESERVED);
}
static void soc_read_resources(device_t dev)

View File

@ -22,13 +22,12 @@ bootblock-$(CONFIG_BOOTBLOCK_CUSTOM) += bootblock.c
################################################################################
# romstage
romstage-y += cbmem.c
romstage-y += bdk-coreboot.c
################################################################################
# ramstage
ramstage-y += cbmem.c
ramstage-y += bdk-coreboot.c
CPPFLAGS_common += -Isrc/soc/cavium/common/include