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mb/intel/adlrvp: Remove unused EC_SYNC_IRQ GPIO on ADLRVP 

As per latest schematics GPP_A15 is not used for EC_SYNC_IRQ
hence remove the unused GPIO.

Wrong GPIO configuration is causing platform reboot issue on
ADLRVP with Chrome SKU.

Change-Id: I704cd722683258c80197d8872d3bdaafb7c923dc
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48131
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
This commit is contained in:
Subrata Banik 2020-11-29 20:44:45 +05:30
parent 5e1d4dd947
commit 52fabb1247
2 changed files with 0 additions and 6 deletions
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3
src/mainboard/intel/adlrvp/include/baseboard/ec.h
View File

@ -56,9 +56,6 @@
/* Enable EC backed ALS device in ACPI */
#define EC_ENABLE_ALS_DEVICE
/* Enable EC sync interrupt, EC_SYNC_IRQ is defined in baseboard/gpio.h */
#define EC_ENABLE_SYNC_IRQ
/* Enable EC backed PD MCU device in ACPI */
#define EC_ENABLE_PD_MCU_DEVICE

3
src/mainboard/intel/adlrvp/include/baseboard/gpio.h
View File

@ -12,7 +12,4 @@
/* EC wake is LAN_WAKE# which is a special DeepSX wake pin */
#define GPE_EC_WAKE GPE0_LAN_WAK
/* EC sync IRQ */
#define EC_SYNC_IRQ GPP_A15_IRQ
#endif /* __BASEBOARD_GPIO_H__ */