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mb/hp/8770w: Transform into variant 

Since this board does not have integrated graphics, do not install the
INT15 handler if it is not selected in Kconfig.

NOTE: Since cmos options are not very flexible, this board ends up with
a spurious gfx_uma_size option. Other than that, everything is the same.

Tested with BUILD_TIMELESS=1, binary does not change when ignoring the
cmos options.

Change-Id: I2ebcfd5160773bf98a3d23e797a89e290063d112
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38094
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Angel Pons 2020-01-02 00:11:30 +01:00 committed by Nico Huber
parent e4faf5a209
commit 533e4399f1
19 changed files with 17 additions and 342 deletions
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51
src/mainboard/hp/8770w/Kconfig
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@ -1,51 +0,0 @@
#
# This file is part of the coreboot project.
#
# Copyright (C) 2017 Iru Cai <mytbk920423@gmail.com>
# Copyright (C) 2018 Robert Reeves
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
if BOARD_HP_8770W
config BOARD_SPECIFIC_OPTIONS
def_bool y
select BOARD_ROMSIZE_KB_16384
select EC_HP_KBC1126
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select HAVE_CMOS_DEFAULT
select HAVE_OPTION_TABLE
select MAINBOARD_USES_IFD_GBE_REGION
select NORTHBRIDGE_INTEL_SANDYBRIDGE
select SERIRQ_CONTINUOUS_MODE
select SOUTHBRIDGE_INTEL_C216
select SUPERIO_SMSC_LPC47N217
select SYSTEM_TYPE_LAPTOP
select USE_NATIVE_RAMINIT
config MAINBOARD_DIR
string
default "hp/8770w"
config MAINBOARD_PART_NUMBER
string
default "EliteBook 8770w"
config MAX_CPUS
int
default 8
config USBDEBUG_HCD_INDEX
int
default 2
endif

2
src/mainboard/hp/8770w/Kconfig.name
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@ -1,2 +0,0 @@
config BOARD_HP_8770W
bool "EliteBook 8770w"

19
src/mainboard/hp/8770w/Makefile.inc
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@ -1,19 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
bootblock-y += gpio.c
romstage-y += gpio.c
bootblock-y += early_init.c
romstage-y += early_init.c

16
src/mainboard/hp/8770w/acpi/ec.asl
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@ -1,16 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2017 Iru Cai <mytbk920423@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <ec/hp/kbc1126/acpi/ec.asl>

27
src/mainboard/hp/8770w/acpi/platform.asl
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@ -1,27 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011-2012 The Chromium OS Authors. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
Method(_WAK,1)
{
\_SB.PCI0.LPCB.EC0.ACPI = 1
\_SB.PCI0.LPCB.EC0.SLPT = 0
Return(Package(){0,0})
}
Method(_PTS,1)
{
\_SB.PCI0.LPCB.EC0.SLPT = Arg0
}

16
src/mainboard/hp/8770w/acpi/superio.asl
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@ -1,16 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <drivers/pc80/pc/ps2_controller.asl>

25
src/mainboard/hp/8770w/acpi_tables.c
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@ -1,25 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <southbridge/intel/bd82x6x/nvs.h>
void acpi_create_gnvs(global_nvs_t *gnvs)
{
// the lid is open by default.
gnvs->lids = 1;
gnvs->tcrt = 100;
gnvs->tpsv = 90;
}

5
src/mainboard/hp/8770w/cmos.default
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@ -1,5 +0,0 @@
boot_option=Fallback
debug_level=Debug
power_on_after_fail=Disable
nmi=Enable
sata_mode=AHCI

109
src/mainboard/hp/8770w/cmos.layout
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@ -1,109 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2007-2008 coresystems GmbH
## Copyright (C) 2014 Vladimir Serbinenko
## Copyright (C) 2018 Robert Reeves
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
# -----------------------------------------------------------------
entries
# -----------------------------------------------------------------
# Status Register A
# -----------------------------------------------------------------
# Status Register B
# -----------------------------------------------------------------
# Status Register C
#96 4 r 0 status_c_rsvd
#100 1 r 0 uf_flag
#101 1 r 0 af_flag
#102 1 r 0 pf_flag
#103 1 r 0 irqf_flag
# -----------------------------------------------------------------
# Status Register D
#104 7 r 0 status_d_rsvd
#111 1 r 0 valid_cmos_ram
# -----------------------------------------------------------------
# Diagnostic Status Register
#112 8 r 0 diag_rsvd1
# -----------------------------------------------------------------
0 120 r 0 reserved_memory
#120 264 r 0 unused
# -----------------------------------------------------------------
# RTC_BOOT_BYTE (coreboot hardcoded)
384 1 e 4 boot_option
388 4 h 0 reboot_counter
#390 2 r 0 unused?
# -----------------------------------------------------------------
# coreboot config options: console
#392 3 r 0 unused
395 4 e 6 debug_level
#399 1 r 0 unused
#400 8 r 0 reserved for century byte
# coreboot config options: southbridge
408 1 e 1 nmi
409 2 e 7 power_on_after_fail
421 1 e 9 sata_mode
# coreboot config options: cpu
#424 8 r 0 unused
# coreboot config options: northbridge
#435 5 r 0 unused
#440 8 h 0 unused
# SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed
928 32 r 0 mrc_scrambler_seed_s3
960 16 r 0 mrc_scrambler_seed_chk
# coreboot config options: check sums
984 16 h 0 check_sum
# -----------------------------------------------------------------
enumerations
#ID value text
1 0 Disable
1 1 Enable
2 0 Enable
2 1 Disable
4 0 Fallback
4 1 Normal
6 0 Emergency
6 1 Alert
6 2 Critical
6 3 Error
6 4 Warning
6 5 Notice
6 6 Info
6 7 Debug
6 8 Spew
7 0 Disable
7 1 Enable
7 2 Keep
9 0 AHCI
9 1 Compatible
# -----------------------------------------------------------------
checksums
checksum 392 447 984

44
src/mainboard/hp/8770w/dsdt.asl
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@ -1,44 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
#include <arch/acpi.h>
DefinitionBlock(
"dsdt.aml",
"DSDT",
0x02, // DSDT revision: ACPI v2.0 and up
OEM_ID,
ACPI_TABLE_CREATOR,
0x20141018 // OEM revision
)
{
#include "acpi/platform.asl"
#include <cpu/intel/common/acpi/cpu.asl>
#include <southbridge/intel/common/acpi/platform.asl>
/* global NVS and variables. */
#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
#include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (\_SB) {
Device (PCI0)
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
}
}
}

25
src/mainboard/hp/8770w/mainboard.c
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@ -1,25 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2017 Iru Cai <mytbk920423@gmail.com>
* Copyright (C) 2018 Robert Reeves
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <device/device.h>
static void mainboard_enable(struct device *dev)
{
}
struct chip_operations mainboard_ops = {
.enable_dev = mainboard_enable,
};

3
src/mainboard/hp/snb_ivb_laptops/Kconfig
View File

@ -37,6 +37,7 @@ config VARIANT_DIR
default "2760p" if BOARD_HP_2760P
default "8460p" if BOARD_HP_8460P
default "8470p" if BOARD_HP_8470P
default "8770w" if BOARD_HP_8770W
config MAINBOARD_PART_NUMBER
string
@ -44,6 +45,7 @@ config MAINBOARD_PART_NUMBER
default "EliteBook 2760p" if BOARD_HP_2760P
default "EliteBook 8460p" if BOARD_HP_8460P
default "EliteBook 8470p" if BOARD_HP_8470P
default "EliteBook 8770w" if BOARD_HP_8770W
config DEVICETREE
string
@ -69,5 +71,6 @@ config USBDEBUG_HCD_INDEX
default 1 if BOARD_HP_2760P
default 1 if BOARD_HP_8460P
default 2 if BOARD_HP_8470P
default 2 if BOARD_HP_8770W
endif

9
src/mainboard/hp/snb_ivb_laptops/Kconfig.name
View File

@ -60,3 +60,12 @@ config BOARD_HP_8470P
select MAINBOARD_USES_IFD_GBE_REGION
select SOUTHBRIDGE_INTEL_C216
select SUPERIO_SMSC_LPC47N217
config BOARD_HP_8770W
bool "EliteBook 8770w"
select BOARD_HP_SNB_IVB_LAPTOPS
select BOARD_ROMSIZE_KB_16384
select MAINBOARD_USES_IFD_GBE_REGION
select SOUTHBRIDGE_INTEL_C216
select SUPERIO_SMSC_LPC47N217

8
src/mainboard/hp/snb_ivb_laptops/mainboard.c
View File

@ -18,9 +18,11 @@
static void mainboard_enable(struct device *dev)
{
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
GMA_INT15_PANEL_FIT_DEFAULT,
GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
if (CONFIG(INTEL_INT15)) {
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
GMA_INT15_PANEL_FIT_DEFAULT,
GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
}
}
struct chip_operations mainboard_ops = {

0
src/mainboard/hp/8770w/board_info.txt → src/mainboard/hp/snb_ivb_laptops/variants/8770w/board_info.txt
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0
src/mainboard/hp/8770w/devicetree.cb → src/mainboard/hp/snb_ivb_laptops/variants/8770w/devicetree.cb
View File

0
src/mainboard/hp/8770w/early_init.c → src/mainboard/hp/snb_ivb_laptops/variants/8770w/early_init.c
View File

0
src/mainboard/hp/8770w/gpio.c → src/mainboard/hp/snb_ivb_laptops/variants/8770w/gpio.c
View File

0
src/mainboard/hp/8770w/hda_verb.c → src/mainboard/hp/snb_ivb_laptops/variants/8770w/hda_verb.c
View File