Adapt all uses of CONFIG_XIP_ROM_BASE to use

AUTO_XIP_ROM_BASE (as implemented for tinybootblock) if available.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5118 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi 2010-02-11 21:51:04 +00:00
parent 97fc40b6b1
commit 535e3b4baa
5 changed files with 33 additions and 5 deletions

View File

@ -236,12 +236,18 @@ clear_fixed_var_mtrr_out:
wrmsr wrmsr
#if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE) #if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE)
#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
#else
#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
#endif
/* enable write base caching so we can do execute in place /* enable write base caching so we can do execute in place
* on the flash rom. * on the flash rom.
*/ */
movl $0x202, %ecx movl $0x202, %ecx
xorl %edx, %edx xorl %edx, %edx
movl $(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax movl $REAL_XIP_ROM_BASE, %eax
orl $MTRR_TYPE_WRBACK, %eax
wrmsr wrmsr
movl $0x203, %ecx movl $0x203, %ecx

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@ -42,10 +42,15 @@ static void do_amd_early_mtrr_init(const unsigned long *mtrr_msrs)
wrmsr(TOP_MEM, msr); wrmsr(TOP_MEM, msr);
#if defined(CONFIG_XIP_ROM_SIZE) #if defined(CONFIG_XIP_ROM_SIZE)
#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
#else
#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
#endif
/* enable write through caching so we can do execute in place /* enable write through caching so we can do execute in place
* on the flash rom. * on the flash rom.
*/ */
set_var_mtrr(1, CONFIG_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK); set_var_mtrr(1, REAL_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK);
#endif #endif
/* Set the default memory type and enable fixed and variable MTRRs /* Set the default memory type and enable fixed and variable MTRRs

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@ -83,7 +83,13 @@ clear_fixed_var_mtrr_out:
/* MTRRPhysBase */ /* MTRRPhysBase */
movl $0x202, %ecx movl $0x202, %ecx
xorl %edx, %edx xorl %edx, %edx
movl $(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax #if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
#else
#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
#endif
movl $REAL_XIP_ROM_BASE, %eax
orl $MTRR_TYPE_WRBACK, %eax
wrmsr wrmsr
/* MTRRPhysMask */ /* MTRRPhysMask */

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@ -200,12 +200,18 @@ clear_fixed_var_mtrr_out:
#endif /* CONFIG_USE_FALLBACK_IMAGE == 1*/ #endif /* CONFIG_USE_FALLBACK_IMAGE == 1*/
#if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE) #if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE)
#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
#else
#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
#endif
/* enable write base caching so we can do execute in place /* enable write base caching so we can do execute in place
* on the flash rom. * on the flash rom.
*/ */
movl $0x202, %ecx movl $0x202, %ecx
xorl %edx, %edx xorl %edx, %edx
movl $(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax movl $REAL_XIP_ROM_BASE, %eax
orl $MTRR_TYPE_WRBACK, %eax
wrmsr wrmsr
movl $0x203, %ecx movl $0x203, %ecx

View File

@ -100,10 +100,15 @@ static void do_early_mtrr_init(const unsigned long *mtrr_msrs)
} }
#if defined(CONFIG_XIP_ROM_SIZE) #if defined(CONFIG_XIP_ROM_SIZE)
#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
#else
#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
#endif
/* enable write through caching so we can do execute in place /* enable write through caching so we can do execute in place
* on the flash rom. * on the flash rom.
*/ */
set_var_mtrr(1, CONFIG_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK); set_var_mtrr(1, REAL_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK);
#endif #endif
/* Set the default memory type and enable fixed and variable MTRRs /* Set the default memory type and enable fixed and variable MTRRs