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superio/smsc/lpc47b397: Use link-time symbols over .c inclusion 

Change-Id: I344f2a8d2ae5f6f3fa04d79773ee1c59de69e425
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8079
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Edward O'Callaghan 2015-01-04 16:41:27 +11:00
parent b8f05d4faa
commit 536a44390d
6 changed files with 15 additions and 6 deletions
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1
src/mainboard/sunw/ultra40/Kconfig
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@ -5,6 +5,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select CPU_AMD_SOCKET_940 select CPU_AMD_SOCKET_940
select NORTHBRIDGE_AMD_AMDK8 select NORTHBRIDGE_AMD_AMDK8
select SOUTHBRIDGE_NVIDIA_CK804 select SOUTHBRIDGE_NVIDIA_CK804
select SUPERIO_SMSC_LPC47B397
select SUPERIO_SMSC_LPC47M10X select SUPERIO_SMSC_LPC47M10X
select HAVE_OPTION_TABLE select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE select HAVE_PIRQ_TABLE

2
src/mainboard/sunw/ultra40/romstage.c
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@ -16,7 +16,7 @@
#include "cpu/x86/lapic.h" #include "cpu/x86/lapic.h"
#include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/reset_test.c"
#include "northbridge/amd/amdk8/debug.c" #include "northbridge/amd/amdk8/debug.c"
#include "superio/smsc/lpc47b397/early_serial.c" #include <superio/smsc/lpc47b397/lpc47b397.h>
#include "cpu/x86/bist.h" #include "cpu/x86/bist.h"
#include "superio/smsc/lpc47b397/early_gpio.c" #include "superio/smsc/lpc47b397/early_gpio.c"
#include "northbridge/amd/amdk8/setup_resource_map.c" #include "northbridge/amd/amdk8/setup_resource_map.c"

2
src/mainboard/tyan/s2895/romstage.c
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@ -15,7 +15,7 @@
#include "lib/delay.c" #include "lib/delay.c"
#include "cpu/x86/lapic.h" #include "cpu/x86/lapic.h"
#include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/reset_test.c"
#include "superio/smsc/lpc47b397/early_serial.c" #include <superio/smsc/lpc47b397/lpc47b397.h>
#include "superio/smsc/lpc47b397/early_gpio.c" #include "superio/smsc/lpc47b397/early_gpio.c"
#include "cpu/x86/bist.h" #include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/debug.c" #include "northbridge/amd/amdk8/debug.c"

1
src/superio/smsc/lpc47b397/Makefile.inc
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@ -20,4 +20,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
## ##
romstage-$(CONFIG_SUPERIO_SMSC_LPC47B397) += early_serial.c
ramstage-$(CONFIG_SUPERIO_SMSC_LPC47B397) += superio.c ramstage-$(CONFIG_SUPERIO_SMSC_LPC47B397) += superio.c

4
src/superio/smsc/lpc47b397/early_serial.c
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@ -21,6 +21,8 @@
*/ */
#include <arch/io.h> #include <arch/io.h>
#include <device/pnp.h>
#include <stdint.h>
#include "lpc47b397.h" #include "lpc47b397.h"
static void pnp_enter_conf_state(pnp_devfn_t dev) static void pnp_enter_conf_state(pnp_devfn_t dev)
@ -35,7 +37,7 @@ static void pnp_exit_conf_state(pnp_devfn_t dev)
outb(0xaa, port); outb(0xaa, port);
} }
static void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase) void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase)
{ {
pnp_enter_conf_state(dev); pnp_enter_conf_state(dev);
pnp_set_logical_device(dev); pnp_set_logical_device(dev);

11
src/superio/smsc/lpc47b397/lpc47b397.h
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@ -20,8 +20,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#ifndef SUPERIO_SMSC_LPC47B397_LPC47B397_H #ifndef SUPERIO_SMSC_LPC47B397_H
#define SUPERIO_SMSC_LPC47B397_LPC47B397_H #define SUPERIO_SMSC_LPC47B397_H
#define LPC47B397_FDC 0 /* Floppy */ #define LPC47B397_FDC 0 /* Floppy */
#define LPC47B397_PP 3 /* Parallel Port */ #define LPC47B397_PP 3 /* Parallel Port */
@ -31,4 +31,9 @@
#define LPC47B397_HWM 8 /* HW Monitor */ #define LPC47B397_HWM 8 /* HW Monitor */
#define LPC47B397_RT 10 /* Runtime reg*/ #define LPC47B397_RT 10 /* Runtime reg*/
#endif #include <arch/io.h>
#include <stdint.h>
void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_SMSC_LPC47B397_H */