src/.../Kconfig: various small fixes to texts
Fixed spelling and added empty lines to separate the help from the text automatically added during make menuconfig. Change-Id: I6eee2c86e30573deb8cf0d42fda8b8329e1156c7 Signed-off-by: Daniele Forsi <dforsi@gmail.com> Reviewed-on: http://review.coreboot.org/6313 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
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src/Kconfig
10
src/Kconfig
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@ -124,7 +124,7 @@ config INCLUDE_CONFIG_FILE
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in the (CBFS) ROM image. This is useful if you want to know which
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in the (CBFS) ROM image. This is useful if you want to know which
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options were used to build a specific coreboot.rom image.
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options were used to build a specific coreboot.rom image.
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Saying Y here will increase the image size by 2-3kB.
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Saying Y here will increase the image size by 2-3KB.
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You can use the following command to easily list the options:
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You can use the following command to easily list the options:
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@ -143,7 +143,7 @@ config INCLUDE_CONFIG_FILE
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Name Offset Type Size
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Name Offset Type Size
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cmos_layout.bin 0x0 cmos layout 1159
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cmos_layout.bin 0x0 cmos layout 1159
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fallback/romstage 0x4c0 stage 339756
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fallback/romstage 0x4c0 stage 339756
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fallback/ramstage 0x53440 stage 186664
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fallback/ramstage 0x53440 stage 186664
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fallback/payload 0x80dc0 payload 51526
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fallback/payload 0x80dc0 payload 51526
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config 0x8d740 raw 3324
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config 0x8d740 raw 3324
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(empty) 0x8e480 null 3610440
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(empty) 0x8e480 null 3610440
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@ -395,7 +395,7 @@ config RELOCATABLE_MODULES
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default n
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default n
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help
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help
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If RELOCATABLE_MODULES is selected then support is enabled for
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If RELOCATABLE_MODULES is selected then support is enabled for
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building relocatable modules in the ram stage. Those modules can be
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building relocatable modules in the RAM stage. Those modules can be
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loaded anywhere and all the relocations are handled automatically.
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loaded anywhere and all the relocations are handled automatically.
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config RELOCATABLE_RAMSTAGE
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config RELOCATABLE_RAMSTAGE
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@ -602,6 +602,7 @@ config SEABIOS_MASTER
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bool "master"
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bool "master"
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help
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help
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Newest SeaBIOS version
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Newest SeaBIOS version
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endchoice
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endchoice
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config SEABIOS_PS2_TIMEOUT
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config SEABIOS_PS2_TIMEOUT
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@ -634,6 +635,7 @@ config GRUB2_MASTER
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bool "HEAD"
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bool "HEAD"
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help
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help
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Newest GRUB2 version
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Newest GRUB2 version
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endchoice
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endchoice
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choice
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choice
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@ -645,10 +647,12 @@ config FILO_STABLE
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bool "0.6.0"
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bool "0.6.0"
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help
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help
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Stable FILO version
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Stable FILO version
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config FILO_MASTER
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config FILO_MASTER
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bool "HEAD"
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bool "HEAD"
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help
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help
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Newest FILO version
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Newest FILO version
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endchoice
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endchoice
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config PAYLOAD_FILE
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config PAYLOAD_FILE
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@ -147,7 +147,7 @@ config CONSOLE_NE2K_DST_IP
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string "Destination IP of logging system"
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string "Destination IP of logging system"
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default "10.0.1.27"
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default "10.0.1.27"
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help
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help
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This is IP adress of the system running for example
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This is IP address of the system running for example
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netcat command to dump the packets.
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netcat command to dump the packets.
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config CONSOLE_NE2K_SRC_IP
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config CONSOLE_NE2K_SRC_IP
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@ -336,7 +336,7 @@ config POST_IO_PORT
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default 0x80
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default 0x80
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help
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help
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POST codes on x86 are typically written to the LPC bus on port
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POST codes on x86 are typically written to the LPC bus on port
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0x80. However, it may be desireable to change the port number
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0x80. However, it may be desirable to change the port number
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depending on the presence of coprocessors/microcontrollers or if the
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depending on the presence of coprocessors/microcontrollers or if the
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platform does not support IO in the conventional x86 manner.
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platform does not support IO in the conventional x86 manner.
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@ -46,10 +46,10 @@ config XIP_ROM_SIZE
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default 0x100000
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default 0x100000
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help
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help
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Overwride the default write through caching size as 1M Bytes.
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Overwride the default write through caching size as 1M Bytes.
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On some AMD paltform, one socket support 2 or more kinds of
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On some AMD platforms, one socket supports 2 or more kinds of
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processor family, compiling several cpu families agesa code
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processor family, compiling several CPU families agesa code
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will increase the romstage size.
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will increase the romstage size.
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In order to execute romstage in place on the flash rom,
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In order to execute romstage in place on the flash ROM,
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more space is required to be set as write through caching.
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more space is required to be set as write through caching.
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config UDELAY_LAPIC_FIXED_FSB
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config UDELAY_LAPIC_FIXED_FSB
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@ -126,7 +126,7 @@ config PARALLEL_MP
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config BACKUP_DEFAULT_SMM_REGION
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config BACKUP_DEFAULT_SMM_REGION
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def_bool n
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def_bool n
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help
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help
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The cpu support will select this option if the default SMM region
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The CPU support will select this option if the default SMM region
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needs to be backed up for suspend/resume purposes.
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needs to be backed up for suspend/resume purposes.
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config MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING
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config MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING
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@ -135,5 +135,5 @@ config MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING
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On certain platforms a boot speed gain can be realized if mirroring
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On certain platforms a boot speed gain can be realized if mirroring
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the payload data stored in non-volatile storage. On x86 systems the
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the payload data stored in non-volatile storage. On x86 systems the
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payload would typically live in a memory-mapped SPI part. Copying
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payload would typically live in a memory-mapped SPI part. Copying
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the SPI contents to ram before performing the load can speed up
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the SPI contents to RAM before performing the load can speed up
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the boot process.
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the boot process.
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@ -74,11 +74,11 @@ config ALWAYS_LOAD_OPROM
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def_bool n
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def_bool n
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depends on VGA_ROM_RUN
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depends on VGA_ROM_RUN
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help
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help
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Always load option roms if any are found. The decision to run
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Always load option ROMs if any are found. The decision to run
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the rom is still determined at runtime, but the distinction
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the ROM is still determined at runtime, but the distinction
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between loading and not running comes into play for CHROMEOS.
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between loading and not running comes into play for CHROMEOS.
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An example where this is required is that VBT (video bios tables)
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An example where this is required is that VBT (Video BIOS Tables)
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are needed for the kernel's display driver to know how a piece of
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are needed for the kernel's display driver to know how a piece of
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hardware is configured to be used.
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hardware is configured to be used.
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@ -493,9 +493,12 @@ config BOOTSPLASH
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bool
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bool
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depends on FRAMEBUFFER_SET_VESA_MODE
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depends on FRAMEBUFFER_SET_VESA_MODE
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help
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help
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This option shows a graphical bootsplash screen. The grapics are
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This option shows a graphical bootsplash screen. The graphics are
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loaded from the CBFS file bootsplash.jpg.
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loaded from the CBFS file bootsplash.jpg.
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You will be able to specify the location and file name of the
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image later.
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config BOOTSPLASH_FILE
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config BOOTSPLASH_FILE
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string "Bootsplash path and filename"
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string "Bootsplash path and filename"
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depends on BOOTSPLASH
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depends on BOOTSPLASH
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help
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help
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The path and filename of the file to use as graphical bootsplash
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The path and filename of the file to use as graphical bootsplash
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screen. The file format has to be jpg.
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screen. The file format has to be jpg.
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endmenu
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endmenu
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menu "PXE ROM"
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menu "PXE ROM"
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@ -2,7 +2,7 @@ config EC_KONTRON_IT8516E
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select EC_ACPI
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select EC_ACPI
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bool
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bool
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help
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help
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Kontron uses an ITE IT8516E on the KTQM77. It's firmware might
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Kontron uses an ITE IT8516E on the KTQM77. Its firmware might
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come from Fintek (mentioned as Finte*c* somewhere in their Linux
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come from Fintek (mentioned as Finte*c* somewhere in their Linux
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driver).
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driver).
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The KTQM77 is an embedded board and the IT8516E seems to be
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The KTQM77 is an embedded board and the IT8516E seems to be
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@ -33,8 +33,8 @@ config VGA_BIOS_ID
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default "8086,0106"
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default "8086,0106"
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help
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help
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This is the default PCI ID for the sandybridge/ivybridge graphics
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This is the default PCI ID for the sandybridge/ivybridge graphics
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devices. This string names the vbios rom in cbfs. The following
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devices. This string names the vbios ROM in cbfs. The following
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PCI IDs will be remapped to load this rom:
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PCI IDs will be remapped to load this ROM:
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0x80860102, 0x8086010a, 0x80860112, 0x80860116
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0x80860102, 0x8086010a, 0x80860112, 0x80860116
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0x80860122, 0x80860126, 0x80860166
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0x80860122, 0x80860126, 0x80860166
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@ -148,7 +148,7 @@ config DCACHE_RAM_ROMSTAGE_STACK_SIZE
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default 0x800
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default 0x800
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help
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help
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The amount of anticipated stack usage from the data cache
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The amount of anticipated stack usage from the data cache
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during pre-ram rom stage execution.
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during pre-RAM ROM stage execution.
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config RESET_ON_INVALID_RAMSTAGE_CACHE
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config RESET_ON_INVALID_RAMSTAGE_CACHE
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bool "Reset the system on S3 wake when ramstage cache invalid."
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bool "Reset the system on S3 wake when ramstage cache invalid."
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default "8086,0f31"
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default "8086,0f31"
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help
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help
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This is the default PCI ID for the Bay Trail graphics
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This is the default PCI ID for the Bay Trail graphics
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devices. This string names the vbios rom in cbfs.
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devices. This string names the vbios ROM in cbfs.
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config INCLUDE_MICROCODE_IN_BUILD
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config INCLUDE_MICROCODE_IN_BUILD
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bool "Build in microcode patch"
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bool "Build in microcode patch"
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@ -98,7 +98,7 @@ config HUDSON_FWM
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if HUDSON_FWM
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if HUDSON_FWM
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config HUDSON_FWM_POSITION
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config HUDSON_FWM_POSITION
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hex "Hudson Firmware rom Position"
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hex "Hudson Firmware ROM Position"
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default 0xFFF20000 if BOARD_ROMSIZE_KB_1024
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default 0xFFF20000 if BOARD_ROMSIZE_KB_1024
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default 0xFFE20000 if BOARD_ROMSIZE_KB_2048
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default 0xFFE20000 if BOARD_ROMSIZE_KB_2048
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default 0xFFC20000 if BOARD_ROMSIZE_KB_4096
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default 0xFFC20000 if BOARD_ROMSIZE_KB_4096
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bool "IDE to AHCI7804"
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bool "IDE to AHCI7804"
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help
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help
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AHCI ROM Required, and AMD driver required in the OS.
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AHCI ROM Required, and AMD driver required in the OS.
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endchoice
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endchoice
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config HUDSON_SATA_MODE
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config HUDSON_SATA_MODE
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help
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help
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The RAID ROM requires that the MISC ROM is located between the range
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The RAID ROM requires that the MISC ROM is located between the range
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0xFFF0_0000 to 0xFFF0_FFFF. Also, it must 1K bytes aligned.
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0xFFF0_0000 to 0xFFF0_FFFF. Also, it must 1K bytes aligned.
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The CONFIG_ROM_SIZE must larger than 0x100000.
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The CONFIG_ROM_SIZE must be larger than 0x100000.
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endif # HUDSON_SATA_RAID
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endif # HUDSON_SATA_RAID
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config HUDSON_LEGACY_FREE
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config HUDSON_LEGACY_FREE
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