- Fix up amd pistachio and dbm690t.
- make uma_memory_base and uma_memory_size uint64_t as they may be 64bit BARs on some platforms. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3949 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -44,7 +44,7 @@ extern void lb_add_memory_range(struct lb_memory *mem, uint32_t type,
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#define ADT7461_write_byte(address, val) \
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#define ADT7461_write_byte(address, val) \
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do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
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do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
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unsigned long uma_memory_start, uma_memory_size;
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uint64_t uma_memory_base, uma_memory_size;
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/********************************************************
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/********************************************************
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* dbm690t uses a BCM5789 as on-board NIC.
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* dbm690t uses a BCM5789 as on-board NIC.
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@ -235,14 +235,14 @@ void dbm690t_enable(device_t dev)
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break;
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break;
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}
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}
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uma_memory_start = msr.lo - uma_memory_size; /* TOP_MEM1 */
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uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
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printk_info("%s: uma size 0x%08x, memory start 0x%08x\n",
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printk_info("%s: uma size 0x%08lx, memory start 0x%08lx\n",
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__func__, uma_memory_size, uma_memory_start);
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__func__, uma_memory_size, uma_memory_base);
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/* TODO: TOP_MEM2 */
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/* TODO: TOP_MEM2 */
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#else
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#else
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uma_memory_size = 0x8000000; /* 128M recommended UMA */
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uma_memory_size = 0x8000000; /* 128M recommended UMA */
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uma_memory_start = 0x38000000; /* 1GB system memory supposed */
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uma_memory_base = 0x38000000; /* 1GB system memory supposed */
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#endif
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#endif
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enable_onboard_nic();
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enable_onboard_nic();
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@ -256,10 +256,10 @@ int add_mainboard_resources(struct lb_memory *mem)
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* in some circumstances we want the memory mentioned as reserved.
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* in some circumstances we want the memory mentioned as reserved.
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*/
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*/
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#if (CONFIG_GFXUMA == 1)
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#if (CONFIG_GFXUMA == 1)
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printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n",
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printk_info("uma_memory_base=0x%lx, uma_memory_size=0x%lx \n",
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uma_memory_start, uma_memory_size);
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uma_memory_base, uma_memory_size);
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lb_add_memory_range(mem, LB_MEM_RESERVED,
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lb_add_memory_range(mem, LB_MEM_RESERVED,
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uma_memory_start, uma_memory_size);
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uma_memory_base, uma_memory_size);
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#endif
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#endif
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}
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}
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@ -42,7 +42,7 @@ extern void lb_add_memory_range(struct lb_memory *mem, uint32_t type,
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#define ADT7475_write_byte(address, val) \
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#define ADT7475_write_byte(address, val) \
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do_smbus_write_byte(SMBUS_IO_BASE, ADT7475_ADDRESS, address, val)
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do_smbus_write_byte(SMBUS_IO_BASE, ADT7475_ADDRESS, address, val)
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unsigned long uma_memory_start, uma_memory_size;
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uint64_t uma_memory_base, uma_memory_size;
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/********************************************************
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/********************************************************
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* pistachio uses a BCM5787 as on-board NIC.
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* pistachio uses a BCM5787 as on-board NIC.
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@ -307,14 +307,14 @@ void pistachio_enable(device_t dev)
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break;
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break;
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}
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}
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uma_memory_start = msr.lo - uma_memory_size; /* TOP_MEM1 */
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uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
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printk_info("%s: uma size 0x%08x, memory start 0x%08x\n",
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printk_info("%s: uma size 0x%08lx, memory start 0x%08lx\n",
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__func__, uma_memory_size, uma_memory_start);
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__func__, uma_memory_size, uma_memory_base);
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/* TODO: TOP_MEM2 */
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/* TODO: TOP_MEM2 */
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#else
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#else
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uma_memory_size = 0x8000000; /* 128M recommended UMA */
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uma_memory_size = 0x8000000; /* 128M recommended UMA */
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uma_memory_start = 0x38000000; /* 1GB system memory supposed */
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uma_memory_base = 0x38000000; /* 1GB system memory supposed */
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#endif
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#endif
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enable_onboard_nic();
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enable_onboard_nic();
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@ -328,10 +328,10 @@ int add_mainboard_resources(struct lb_memory *mem)
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* in some circumstances we want the memory mentioned as reserved.
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* in some circumstances we want the memory mentioned as reserved.
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*/
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*/
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#if (CONFIG_GFXUMA == 1)
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#if (CONFIG_GFXUMA == 1)
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printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n",
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printk_info("uma_memory_base=0x%lx, uma_memory_size=0x%lx \n",
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uma_memory_start, uma_memory_size);
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uma_memory_base, uma_memory_size);
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lb_add_memory_range(mem, LB_MEM_RESERVED,
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lb_add_memory_range(mem, LB_MEM_RESERVED,
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uma_memory_start, uma_memory_size);
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uma_memory_base, uma_memory_size);
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#endif
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#endif
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}
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}
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@ -307,10 +307,10 @@ u8 PcieTrainPort(device_t nb_dev, device_t dev, u32 port)
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*/
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*/
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void rs690_set_tom(device_t nb_dev)
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void rs690_set_tom(device_t nb_dev)
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{
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{
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extern unsigned long uma_memory_start;
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extern uint64_t uma_memory_base;
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/* set TOM */
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/* set TOM */
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pci_write_config32(nb_dev, 0x90, uma_memory_start);
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pci_write_config32(nb_dev, 0x90, uma_memory_base);
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nbmc_write_index(nb_dev, 0x1e, uma_memory_start);
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nbmc_write_index(nb_dev, 0x1e, uma_memory_base);
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}
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}
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