sb/via/k8t890: Define ACPI sleep states
Change-Id: I9afd5eaab5f8e897dea037f32e1666ad31b0f8df Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21144 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
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@ -20,13 +20,7 @@
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DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "COREBOOT", 1)
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{
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/* For now only define 2 power states:
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* - S0 which is fully on
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* - S5 which is soft off
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* Any others would involve declaring the wake up methods.
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*/
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Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 })
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Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 })
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#include <southbridge/via/k8t890/acpi/sleepstates.asl>
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/* Root of the bus hierarchy */
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Scope (\_SB)
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@ -22,13 +22,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "COREBOOT", 1)
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{
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#include "northbridge/amd/amdk8/util.asl"
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/* For now only define 2 power states:
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* - S0 which is fully on
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* - S5 which is soft off
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* Any others would involve declaring the wake up methods.
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*/
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Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 })
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Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 })
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#include <southbridge/via/k8t890/acpi/sleepstates.asl>
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/* Root of the bus hierarchy */
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Scope (\_SB)
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@ -22,13 +22,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "COREBOOT", 1)
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{
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#include "northbridge/amd/amdk8/util.asl"
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/* For now only define 2 power states:
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* - S0 which is fully on
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* - S5 which is soft off
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* Any others would involve declaring the wake up methods.
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*/
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Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 })
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Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 })
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#include <southbridge/via/k8t890/acpi/sleepstates.asl>
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/* Root of the bus hierarchy */
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Scope (\_SB)
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@ -22,15 +22,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "COREBOOT", 1)
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{
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#include "northbridge/amd/amdk8/util.asl"
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/* For now only define 2 power states:
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* - S0 which is fully on
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* - S5 which is soft off
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* Any others would involve declaring the wake up methods.
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*/
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Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 })
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Name (\_S3, Package () { 0x01, 0x01, 0x00, 0x00 })
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Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 })
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#include <southbridge/via/k8t890/acpi/sleepstates.asl>
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/* blink a LED when entering the sleep (any type) */
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Method (_PTS, 1, NotSerialized)
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@ -55,22 +55,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE ", "COREBOOT", 1)
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/* _PR CPU0 is dynamically supplied by SSDT */
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/* We define 3 power states:
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* - S0 which is fully on
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* - S3 which is suspend to ram
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* - S5 which is soft off
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*
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* Package contents:
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* ofs len desc
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* 0 1 Value for PM1a_CNT.SLP_TYP register to enter this system state.
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* 1 1 Value for PM1b_CNT.SLP_TYP register to enter this system state. To enter any
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* given state, OSPM must write the PM1a_CNT.SLP_TYP register before the
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* PM1b_CNT.SLP_TYP register.
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* 2 2 Reserved
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*/
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Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 })
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Name (\_S3, Package () { 0x01, 0x01, 0x00, 0x00 })
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Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 })
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#include <southbridge/via/k8t890/acpi/sleepstates.asl>
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/* Root of the bus hierarchy */
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Scope (\_SB)
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@ -0,0 +1,31 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2009 coresystems GmbH
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* Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
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#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
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Name (SSFG, 0x04)
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#else
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Name (SSFG, 0x00)
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#endif
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/* Supported sleep states: */
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Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
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If (And(SSFG, 0x04)) {
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Name(\_S3, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
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}
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Name(\_S5, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S5) - Soft Off */
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