GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/volteer/variants/volteer2: Update DPTF parameters 

1. Apply the DPTF parameters received from the thermal team.

BUG=b:169183507
TEST=build and verify by thermal tool

Signed-off-by: Terry Chen <terry_chen@wistron.corp-partner.google.com>
Change-Id: I1a1a0f9e86e519ac15904fac80cf3c2299213e52
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46087
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Terry Chen 2020-10-06 20:09:15 +08:00 committed by Tim Wawrzynczak
parent 19df8d85e0
commit 53a69507c4
1 changed files with 37 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

37
src/mainboard/google/volteer/variants/volteer2/overridetree.cb
View File

@ -6,6 +6,43 @@ chip soc/intel/tigerlake
register "DdiPort2Hpd" = "0"
device domain 0 on
device pci 04.0 on
chip drivers/intel/dptf
## Active Policy
register "policies.active" = "{
[0] = {.target = DPTF_CPU,
.thresholds = {TEMP_PCT(85, 90),
TEMP_PCT(80, 69),
TEMP_PCT(75, 56),
TEMP_PCT(70, 46),
TEMP_PCT(65, 36),}},
[1] = {.target = DPTF_TEMP_SENSOR_0,
.thresholds = {TEMP_PCT(53, 90),
TEMP_PCT(50, 69),
TEMP_PCT(48, 56),
TEMP_PCT(45, 46),
TEMP_PCT(42, 36),}},
[2] = {.target = DPTF_TEMP_SENSOR_1,
.thresholds = {TEMP_PCT(50, 90),
TEMP_PCT(47, 69),
TEMP_PCT(45, 56),
TEMP_PCT(42, 46),
TEMP_PCT(39, 36),}},
[3] = {.target = DPTF_TEMP_SENSOR_2,
.thresholds = {TEMP_PCT(53, 90),
TEMP_PCT(50, 69),
TEMP_PCT(48, 56),
TEMP_PCT(45, 46),
TEMP_PCT(42, 36),}},
[4] = {.target = DPTF_TEMP_SENSOR_3,
.thresholds = {TEMP_PCT(53, 90),
TEMP_PCT(50, 69),
TEMP_PCT(48, 56),
TEMP_PCT(45, 46),
TEMP_PCT(42, 36),}}}"
device generic 0 on end
end
end # DPTF 0x9A03
device pci 05.0 on end # IPU 0x9A19
device pci 15.0 on
chip drivers/i2c/generic