mb/google/brya: enable PCIe RP12 for lisbon eMMC support

BUG=b:246657849
TEST=FW_NAME=lisbon emerge-brask coreboot

Signed-off-by: Kevin Chiu <kevin.chiu.17802@gmail.com>
Change-Id: Ief8ca9cf845156ac761556d0eb49edb65894c001
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68167
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ricky Chang <rickytlchang@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
This commit is contained in:
Kevin Chiu 2022-10-06 19:18:04 +08:00 committed by Felix Held
parent 83e9456676
commit 53cfdc8660
1 changed files with 8 additions and 0 deletions

View File

@ -200,6 +200,14 @@ chip soc/intel/alderlake
device generic 0 on end
end
end #PCIE8 SD card
device ref pcie_rp12 on
# Enable PCIE eMMC bridge 12 using clk 4
register "pch_pcie_rp[PCH_RP(12)]" = "{
.clk_src = 4,
.clk_req = 4,
.flags = PCIE_RP_HOTPLUG | PCIE_RP_AER,
}"
end #PCIE12 EMMC
device ref gspi1 off end
device ref pch_espi on
chip ec/google/chromeec