mb/roda/rk9: Convert to ASL 2.0 syntax
Generated build/dsdt.dsl are identical. Change-Id: I3cfa9d3a199a33ac8faddf4dbc1eed0df8703835 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46210 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
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53dd00a6b0
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@ -59,9 +59,9 @@ Device (BAT1)
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Method(_BIF, 0)
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Method(_BIF, 0)
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{
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{
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If(\_SB.PCI0.LPCB.EC0.ECON) {
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If(\_SB.PCI0.LPCB.EC0.ECON) {
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Store (\_SB.PCI0.LPCB.EC0.B1DW, Index(PBIF, 1))
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PBIF [1] = \_SB.PCI0.LPCB.EC0.B1DW
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Store (\_SB.PCI0.LPCB.EC0.B1FW, Index(PBIF, 2))
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PBIF [2] = \_SB.PCI0.LPCB.EC0.B1FW
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Store (\_SB.PCI0.LPCB.EC0.B1DV, Index(PBIF, 4))
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PBIF [4] = \_SB.PCI0.LPCB.EC0.B1DV
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}
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}
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Return(PBIF)
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Return(PBIF)
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@ -71,26 +71,26 @@ Device (BAT1)
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Method(_BST, 0)
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Method(_BST, 0)
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{
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{
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If(\_SB.PCI0.LPCB.EC0.ECON) {
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If(\_SB.PCI0.LPCB.EC0.ECON) {
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Store (\_SB.PCI0.LPCB.EC0.B1PW, Local0)
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Local0 = \_SB.PCI0.LPCB.EC0.B1PW
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If (LGreaterEqual (Local0, 0x8000)) {
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If (Local0 >= 0x8000) {
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Subtract (0x10000, Local0, Local0)
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Local0 = 0x10000 - Local0
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}
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}
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Store (Local0, Index(PBST, 1))
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PBST [1] = Local0
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Store (\_SB.PCI0.LPCB.EC0.B1PV, Index(PBST, 3))
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PBST [3] = \_SB.PCI0.LPCB.EC0.B1PV
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Store (\_SB.PCI0.LPCB.EC0.B1RW, Index(PBST, 2))
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PBST [2] = \_SB.PCI0.LPCB.EC0.B1RW
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If (\_SB.PCI0.LPCB.EC0.ACCH) {
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If (\_SB.PCI0.LPCB.EC0.ACCH) {
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If (\_SB.PCI0.LPCB.EC0.B1CH) {
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If (\_SB.PCI0.LPCB.EC0.B1CH) {
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If (\_SB.PCI0.LPCB.EC0.B1CG) {
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If (\_SB.PCI0.LPCB.EC0.B1CG) {
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Store (2, Index(PBST, 0))
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PBST [0] = 2
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}
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}
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}
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}
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} Else {
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} Else {
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If (\_SB.PCI0.LPCB.EC0.B1LO) {
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If (\_SB.PCI0.LPCB.EC0.B1LO) {
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Store (5, Index(PBST, 0))
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PBST [0] = 5
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} Else {
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} Else {
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Store (1, Index(PBST, 0))
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PBST [0] = 1
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}
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}
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}
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}
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}
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}
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@ -153,9 +153,9 @@ Device (BAT2)
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Method(_BIF, 0)
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Method(_BIF, 0)
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{
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{
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If(\_SB.PCI0.LPCB.EC0.ECON) {
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If(\_SB.PCI0.LPCB.EC0.ECON) {
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Store (\_SB.PCI0.LPCB.EC0.B2DW, Index(PBIF, 1))
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PBIF [1] = \_SB.PCI0.LPCB.EC0.B2DW
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Store (\_SB.PCI0.LPCB.EC0.B2FW, Index(PBIF, 2))
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PBIF [2] = \_SB.PCI0.LPCB.EC0.B2FW
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Store (\_SB.PCI0.LPCB.EC0.B2DV, Index(PBIF, 4))
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PBIF [4] = \_SB.PCI0.LPCB.EC0.B2DV
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}
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}
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Return(PBIF)
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Return(PBIF)
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@ -165,26 +165,26 @@ Device (BAT2)
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Method(_BST, 0)
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Method(_BST, 0)
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{
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{
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If(\_SB.PCI0.LPCB.EC0.ECON) {
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If(\_SB.PCI0.LPCB.EC0.ECON) {
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Store (\_SB.PCI0.LPCB.EC0.B2PW, Local0)
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Local0 = \_SB.PCI0.LPCB.EC0.B2PW
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If (LGreaterEqual (Local0, 0x8000)) {
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If (Local0 >= 0x8000) {
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Subtract (0x10000, Local0, Local0)
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Local0 = 0x10000 - Local0
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}
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}
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Store (Local0, Index(PBST, 1))
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PBST [1] = Local0
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Store (\_SB.PCI0.LPCB.EC0.B2PV, Index(PBST, 3))
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PBST [3] = \_SB.PCI0.LPCB.EC0.B2PV
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Store (\_SB.PCI0.LPCB.EC0.B2RW, Index(PBST, 2))
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PBST [2] = \_SB.PCI0.LPCB.EC0.B2RW
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If (\_SB.PCI0.LPCB.EC0.ACCH) {
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If (\_SB.PCI0.LPCB.EC0.ACCH) {
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If (\_SB.PCI0.LPCB.EC0.B2CH) {
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If (\_SB.PCI0.LPCB.EC0.B2CH) {
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If (\_SB.PCI0.LPCB.EC0.B2CG) {
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If (\_SB.PCI0.LPCB.EC0.B2CG) {
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Store (2, Index(PBST, 0))
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PBST [0] = 2
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}
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}
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}
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}
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} Else {
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} Else {
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If (\_SB.PCI0.LPCB.EC0.B2LO) {
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If (\_SB.PCI0.LPCB.EC0.B2LO) {
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Store (5, Index(PBST, 0))
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PBST [0] = 5
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} Else {
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} Else {
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Store (1, Index(PBST, 0))
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PBST [0] = 1
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}
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}
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}
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}
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}
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}
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@ -199,7 +199,7 @@ Device (ADP1)
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Name (_HID, "ACPI0003")
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Name (_HID, "ACPI0003")
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Method (_PSR, 0)
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Method (_PSR, 0)
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{
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{
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Store (\_SB.PCI0.LPCB.EC0.ACCH, PWRS)
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PWRS = \_SB.PCI0.LPCB.EC0.ACCH
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Stall (0x02)
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Stall (0x02)
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Return (PWRS)
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Return (PWRS)
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}
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}
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@ -70,8 +70,8 @@ Device(EC0)
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// This method is needed by Windows XP/2000 for
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// This method is needed by Windows XP/2000 for
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// EC initialization before a driver is loaded
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// EC initialization before a driver is loaded
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If (LEqual(Arg0, 0x03)) {
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If (Arg0 == 0x03) {
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Store (Arg1, ECON)
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ECON = Arg1
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}
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}
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}
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}
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@ -79,98 +79,98 @@ Device(EC0)
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Method (_Q11, 0)
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Method (_Q11, 0)
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{
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{
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Store("_Q11: Fn-F8 (Sleep Button) pressed", Debug)
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Debug = "_Q11: Fn-F8 (Sleep Button) pressed"
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Notify(SLPB, 0x80)
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Notify(SLPB, 0x80)
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}
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}
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Method (_Q30, 0)
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Method (_Q30, 0)
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{
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{
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Store("_Q30: AC In", Debug)
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Debug = "_Q30: AC In"
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Notify(ADP1, 0x80) // Tell the Power Adapter
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Notify(ADP1, 0x80) // Tell the Power Adapter
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PNOT() // and the CPU and Battery
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PNOT() // and the CPU and Battery
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}
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}
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Method (_Q31, 0)
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Method (_Q31, 0)
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{
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{
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Store("_Q31: AC Out", Debug)
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Debug = "_Q31: AC Out"
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Notify(ADP1, 0x80) // Tell the Power Adapter
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Notify(ADP1, 0x80) // Tell the Power Adapter
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PNOT() // and the CPU and Battery
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PNOT() // and the CPU and Battery
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}
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}
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Method (_Q32, 0)
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Method (_Q32, 0)
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{
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{
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Store("_Q32: Bat1 In", Debug)
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Debug = "_Q32: Bat1 In"
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Notify(BAT1, 0x81)
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Notify(BAT1, 0x81)
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}
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}
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Method (_Q33, 0)
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Method (_Q33, 0)
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{
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{
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Store("_Q33: Bat1 Out", Debug)
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Debug = "_Q33: Bat1 Out"
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Notify(BAT1, 0x81)
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Notify(BAT1, 0x81)
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}
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}
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Method (_Q34, 0)
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Method (_Q34, 0)
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{
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{
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Store("_Q34: Bat2 In", Debug)
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Debug = "_Q34: Bat2 In"
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Notify(BAT2, 0x81)
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Notify(BAT2, 0x81)
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}
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}
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Method (_Q35, 0)
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Method (_Q35, 0)
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{
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{
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Store("_Q35: Bat2 Out", Debug)
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Debug = "_Q35: Bat2 Out"
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Notify(BAT2, 0x81)
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Notify(BAT2, 0x81)
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}
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}
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Method (_Q36, 0)
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Method (_Q36, 0)
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{
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{
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Store("_Q36: Bat1 Low Power", Debug)
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Debug = "_Q36: Bat1 Low Power"
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Notify(BAT1, 0x80)
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Notify(BAT1, 0x80)
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}
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}
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Method (_Q37, 0)
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Method (_Q37, 0)
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{
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{
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Store("_Q37: Bat1 Full Charge", Debug)
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Debug = "_Q37: Bat1 Full Charge"
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Notify(BAT1, 0x80)
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Notify(BAT1, 0x80)
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}
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}
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Method (_Q38, 0)
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Method (_Q38, 0)
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{
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{
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Store("_Q38: Bat2 Low Power", Debug)
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Debug = "_Q38: Bat2 Low Power"
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Notify(BAT2, 0x80)
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Notify(BAT2, 0x80)
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}
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}
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Method (_Q39, 0)
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Method (_Q39, 0)
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{
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{
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Store("_Q39: Bat2 Full Charge", Debug)
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Debug = "_Q39: Bat2 Full Charge"
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Notify(BAT2, 0x80)
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Notify(BAT2, 0x80)
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}
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}
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Method (_Q40, 0)
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Method (_Q40, 0)
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{
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{
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Store("_Q40: LID Open/Close", Debug)
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Debug = "_Q40: LID Open/Close"
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Notify(LID0, 0x80)
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Notify(LID0, 0x80)
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}
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}
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Method (_Q41, 0)
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Method (_Q41, 0)
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{
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{
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Store("_Q41: Floppy on Parallel Port: Call the Museum!", Debug)
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Debug = "_Q41: Floppy on Parallel Port: Call the Museum!"
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}
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}
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Method (_Q50, 0)
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Method (_Q50, 0)
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{
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{
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Store("_Q50: Processor is hot", Debug)
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Debug = "_Q50: Processor is hot"
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Notify(\_TZ.THRM, 0x80)
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Notify(\_TZ.THRM, 0x80)
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}
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}
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Method (_Q51, 0)
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Method (_Q51, 0)
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{
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{
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Store("_Q51: Processor is boiling", Debug)
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Debug = "_Q51: Processor is boiling"
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Notify(\_TZ.THRM, 0x80)
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Notify(\_TZ.THRM, 0x80)
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}
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}
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Method (_Q52, 0)
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Method (_Q52, 0)
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{
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{
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Store("_Q52: Processor is burning", Debug)
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Debug = "_Q52: Processor is burning"
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Notify(\_TZ.THRM, 0x80)
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Notify(\_TZ.THRM, 0x80)
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}
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}
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@ -20,12 +20,12 @@ Method(_WAK,1)
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// was inserted while a sleep state was active.
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// was inserted while a sleep state was active.
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// Are we going to S3?
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// Are we going to S3?
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If (LEqual(Arg0, 3)) {
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If (Arg0 == 3) {
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// ..
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// ..
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}
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}
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// Are we going to S4?
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// Are we going to S4?
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If (LEqual(Arg0, 4)) {
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If (Arg0 == 4) {
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// ..
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// ..
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}
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}
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@ -19,13 +19,13 @@ Device (SIO1)
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Method (READ, 3)
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Method (READ, 3)
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{
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{
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Acquire (SIOM, 0xffff)
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Acquire (SIOM, 0xffff)
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If (LEqual(Arg0, 0)) {
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If (Arg0 == 0) {
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Store (0x55, INDX)
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INDX = 0x55
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Store (Arg1, INDX)
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INDX = Arg1
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Store (DATA, Local1)
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Local1 = DATA
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Store (0xaa, INDX)
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INDX = 0xaa
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}
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}
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And (Local1, Arg2, Local1)
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Local1 &= Arg2
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Release(SIOM)
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Release(SIOM)
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Return(Local1)
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Return(Local1)
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}
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}
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@ -33,11 +33,11 @@ Device (SIO1)
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Method (WRIT, 3)
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Method (WRIT, 3)
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{
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{
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Acquire (SIOM, 0xffff)
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Acquire (SIOM, 0xffff)
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If (LEqual(Arg0, 0)) {
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If (Arg0 == 0) {
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Store (0x55, INDX)
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INDX = 0x55
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Store (Arg1, INDX)
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INDX = Arg1
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Store (Arg2, DATA)
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DATA = Arg2
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Store (0xaa, INDX)
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INDX = 0xaa
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}
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}
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Release(SIOM)
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Release(SIOM)
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}
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}
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@ -52,18 +52,18 @@ Device (SIO1)
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Method (_STA, 0)
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Method (_STA, 0)
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{
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{
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// Device disabled by coreboot?
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// Device disabled by coreboot?
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If (LEqual(CMAP, 0)) {
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If (CMAP == 0) {
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Return (0)
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Return (0)
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}
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}
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// Is the hardware enabled?
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// Is the hardware enabled?
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Store (READ(0, 0x24, 0xff), Local0)
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Local0 = READ (0, 0x24, 0xff)
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If (LEqual(Local0, 0)) {
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If (Local0 == 0) {
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Return (0xd)
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Return (0xd)
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} Else {
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} Else {
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// Power Enabled?
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// Power Enabled?
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Store (READ(0, 0x02, 0x08), Local0)
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Local0 = READ (0, 0x02, 0x08)
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If (LEqual(Local0, 0)) {
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If (Local0 == 0) {
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Return (0x0d)
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Return (0x0d)
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} Else {
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} Else {
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Return (0x0f)
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Return (0x0f)
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@ -76,12 +76,12 @@ Device (SIO1)
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{
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{
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WRIT(0, 0x24, 0x00)
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WRIT(0, 0x24, 0x00)
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Store(READ(0, 0x28, 0x0f), Local0)
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Local0 = READ (0, 0x28, 0x0f)
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WRIT(0, 0x28, Local0)
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WRIT(0, 0x28, Local0)
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Store(READ(0, 0x02, 0xff), Local0)
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Local0 = READ(0, 0x02, 0xff)
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Not(0x08, Local1)
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Local1 = ~0x08
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And(Local0, Local1, Local0)
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Local0 &= Local1
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WRIT(0, 0x02, Local0)
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WRIT(0, 0x02, Local0)
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}
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}
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@ -106,8 +106,8 @@ Device (SIO1)
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IRQNoFlags(_IRA) { 4 }
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IRQNoFlags(_IRA) { 4 }
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})
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})
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And (_STA(), 0x02, Local0)
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Local0 = _STA() & 0x02
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If (LEqual(Local0, 0)) {
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If (Local0 == 0) {
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Return(NONE)
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Return(NONE)
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}
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}
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@ -119,15 +119,15 @@ Device (SIO1)
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\_SB.PCI0.LPCB.SIO1.COMA._CRS._IRA._INT, IRQ)
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\_SB.PCI0.LPCB.SIO1.COMA._CRS._IRA._INT, IRQ)
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/* I/O Base */
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/* I/O Base */
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Store (READ(0, 0x24, 0xfe), Local0)
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Local0 = READ (0, 0x24, 0xfe)
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ShiftLeft(Local0, 0x02, Local0)
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Local0 <<= 2
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Store(Local0, IOMN)
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IOMN = Local0
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Store(Local0, IOMX)
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IOMX = Local0
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/* Interrupt */
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/* Interrupt */
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Store(READ(0, 0x28, 0xf0), Local0)
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Local0 = READ (0, 0x28, 0xf0)
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ShiftRight(Local0, 4, Local0)
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Local0 >>= 4
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ShiftLeft(1, Local0, IRQ)
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IRQ = 1 << Local0
|
||||||
Return(RSRC)
|
Return(RSRC)
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -140,29 +140,29 @@ Device (SIO1)
|
||||||
|
|
||||||
WRIT(0, 0x24, 0)
|
WRIT(0, 0x24, 0)
|
||||||
FindSetRightBit(IRQL, Local0)
|
FindSetRightBit(IRQL, Local0)
|
||||||
Decrement(Local0)
|
Local0--
|
||||||
ShiftLeft(Local0, 4, Local0)
|
Local0 <<= 4
|
||||||
|
|
||||||
Store(READ(0, 0x28, 0x0f), Local1)
|
Local1 = READ (0, 0x28, 0x0f)
|
||||||
Or(Local0, Local1, Local0)
|
Local0 |= Local1
|
||||||
WRIT(0, 0x28, Local0)
|
WRIT(0, 0x28, Local0)
|
||||||
|
|
||||||
Store(IOLO, Local0)
|
Local0 = IOLO
|
||||||
ShiftRight(Local0, 2, Local0)
|
Local0 >>= 2
|
||||||
And(Local0, 0xfe, Local0)
|
Local0 &= 0xfe
|
||||||
|
|
||||||
Store(IOHI, Local1)
|
Local1 = IOHI
|
||||||
ShiftLeft(Local1, 6, Local1)
|
Local1 <<= 6
|
||||||
Or (Local0, Local1, Local0)
|
Local0 |= Local1
|
||||||
WRIT(0, 0x24, Local0)
|
WRIT(0, 0x24, Local0)
|
||||||
|
|
||||||
Store(READ(0, 0x02, 0xff), Local0)
|
Local0 = READ(0, 0x02, 0xff)
|
||||||
Or(Local0, 0x08, Local0)
|
Local0 |= 0x08
|
||||||
WRIT(0, 0x02, Local0)
|
WRIT(0, 0x02, Local0)
|
||||||
|
|
||||||
Store(READ(0, 0x07, 0xff), Local0)
|
Local0 = READ (0, 0x07, 0xff)
|
||||||
Not(0x40, Local1)
|
Local1 = ~0x40
|
||||||
And (Local0, Local1, Local0)
|
Local0 &= Local1
|
||||||
WRIT(0, 0x07, Local0)
|
WRIT(0, 0x07, Local0)
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -170,22 +170,22 @@ Device (SIO1)
|
||||||
/* D0 state - Line drivers are on */
|
/* D0 state - Line drivers are on */
|
||||||
Method (_PS0, 0)
|
Method (_PS0, 0)
|
||||||
{
|
{
|
||||||
Store(READ(0, 0x02, 0xff), Local0)
|
Local0 = READ(0, 0x02, 0xff)
|
||||||
Or(Local0, 0x08, Local0)
|
Local0 |= 0x08
|
||||||
WRIT(0, 0x02, Local0)
|
WRIT(0, 0x02, Local0)
|
||||||
|
|
||||||
Store (READ(0, 0x07, 0xff), Local0)
|
Local0 = READ (0, 0x07, 0xff)
|
||||||
Not(0x40, Local1)
|
Local1 = ~0x40
|
||||||
And(Local0, Local1, Local0)
|
Local0 &= Local1
|
||||||
WRIT(0, 0x07, Local0)
|
WRIT(0, 0x07, Local0)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* D3 State - Line drivers are off */
|
/* D3 State - Line drivers are off */
|
||||||
Method(_PS3, 0)
|
Method(_PS3, 0)
|
||||||
{
|
{
|
||||||
Store(READ(0, 0x02, 0xff), Local0)
|
Local0 = READ(0, 0x02, 0xff)
|
||||||
Not(0x08, Local1)
|
Local1 = ~0x08
|
||||||
And(Local0, Local1, Local0)
|
Local0 &= Local1
|
||||||
WRIT(0, 0x02, Local0)
|
WRIT(0, 0x02, Local0)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -200,24 +200,24 @@ Device (SIO1)
|
||||||
Method (_STA, 0)
|
Method (_STA, 0)
|
||||||
{
|
{
|
||||||
// Device disabled by coreboot?
|
// Device disabled by coreboot?
|
||||||
If (LEqual(CMBP, 0)) {
|
If (CMBP == 0) {
|
||||||
Return (0)
|
Return (0)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* IRDA? */
|
/* IRDA? */
|
||||||
Store(READ(0, 0x0c, 0x38), Local0)
|
Local0 = READ (0, 0x0c, 0x38)
|
||||||
If (LNotEqual(Local0, Zero)) {
|
If (Local0 != 0) {
|
||||||
Return (0)
|
Return (0)
|
||||||
}
|
}
|
||||||
|
|
||||||
// Is the hardware enabled?
|
// Is the hardware enabled?
|
||||||
Store (READ(0, 0x25, 0xff), Local0)
|
Local0 = READ (0, 0x25, 0xff)
|
||||||
If (LEqual(Local0, 0)) {
|
If (Local0 == 0) {
|
||||||
Return (0xd)
|
Return (0xd)
|
||||||
} Else {
|
} Else {
|
||||||
// Power Enabled?
|
// Power Enabled?
|
||||||
Store (READ(0, 0x02, 0x80), Local0)
|
Local0 = READ (0, 0x02, 0x80)
|
||||||
If (LEqual(Local0, 0)) {
|
If (Local0 == 0) {
|
||||||
Return (0x0d)
|
Return (0x0d)
|
||||||
} Else {
|
} Else {
|
||||||
Return (0x0f)
|
Return (0x0f)
|
||||||
|
@ -230,12 +230,12 @@ Device (SIO1)
|
||||||
{
|
{
|
||||||
WRIT(0, 0x25, 0x00)
|
WRIT(0, 0x25, 0x00)
|
||||||
|
|
||||||
Store(READ(0, 0x28, 0xf0), Local0)
|
Local0 = READ (0, 0x28, 0xf0)
|
||||||
WRIT(0, 0x28, Local0)
|
WRIT(0, 0x28, Local0)
|
||||||
|
|
||||||
Store(READ(0, 0x02, 0xff), Local0)
|
Local0 = READ(0, 0x02, 0xff)
|
||||||
Not(0x80, Local1)
|
Local1 = ~0x80
|
||||||
And(Local0, Local1, Local0)
|
Local0 &= Local1
|
||||||
WRIT(0, 0x02, Local0)
|
WRIT(0, 0x02, Local0)
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -260,8 +260,8 @@ Device (SIO1)
|
||||||
IRQNoFlags(_IRB) { 3 }
|
IRQNoFlags(_IRB) { 3 }
|
||||||
})
|
})
|
||||||
|
|
||||||
And (_STA(), 0x02, Local0)
|
Local0 = _STA() & 0x02
|
||||||
If (LEqual(Local0, 0)) {
|
If (Local0 == 0) {
|
||||||
Return(NONE)
|
Return(NONE)
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -273,14 +273,14 @@ Device (SIO1)
|
||||||
\_SB.PCI0.LPCB.SIO1.COMB._CRS._IRB._INT, IRQ)
|
\_SB.PCI0.LPCB.SIO1.COMB._CRS._IRB._INT, IRQ)
|
||||||
|
|
||||||
/* I/O Base */
|
/* I/O Base */
|
||||||
Store (READ(0, 0x25, 0xfe), Local0)
|
Local0 = READ (0, 0x25, 0xfe)
|
||||||
ShiftLeft(Local0, 0x02, Local0)
|
Local0 <<= 2
|
||||||
Store(Local0, IOMN)
|
IOMN = Local0
|
||||||
Store(Local0, IOMX)
|
IOMX = Local0
|
||||||
|
|
||||||
/* Interrupt */
|
/* Interrupt */
|
||||||
Store(READ(0, 0x28, 0x0f), Local0)
|
Local0 = READ (0, 0x28, 0x0f)
|
||||||
ShiftLeft(1, Local0, IRQ)
|
IRQ = 1 << Local0
|
||||||
Return(RSRC)
|
Return(RSRC)
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -293,55 +293,55 @@ Device (SIO1)
|
||||||
|
|
||||||
WRIT(0, 0x25, 0)
|
WRIT(0, 0x25, 0)
|
||||||
FindSetRightBit(IRQL, Local0)
|
FindSetRightBit(IRQL, Local0)
|
||||||
Decrement(Local0)
|
Local0--
|
||||||
|
|
||||||
Store(READ(0, 0x28, 0xf0), Local1)
|
Local1 = READ (0, 0x28, 0xf0)
|
||||||
Or(Local0, Local1, Local0)
|
Local0 |= Local1
|
||||||
WRIT(0, 0x28, Local0)
|
WRIT(0, 0x28, Local0)
|
||||||
|
|
||||||
Store(IOLO, Local0)
|
Local0 = IOLO
|
||||||
ShiftRight(Local0, 2, Local0)
|
Local0 >>= 2
|
||||||
And(Local0, 0xfe, Local0)
|
Local0 &= 0xfe
|
||||||
|
|
||||||
Store(IOHI, Local1)
|
Local1 = IOHI
|
||||||
ShiftLeft(Local1, 6, Local1)
|
Local1 <<= 6
|
||||||
Or (Local0, Local1, Local0)
|
Local0 |= Local1
|
||||||
WRIT(0, 0x25, Local0)
|
WRIT(0, 0x25, Local0)
|
||||||
|
|
||||||
Store(READ(0, 0x0c, 0xff), Local0)
|
Local0 = READ (0, 0x0c, 0xff)
|
||||||
Not(0x38, Local1)
|
Local1 = ~0x38
|
||||||
And(Local0, Local1, Local0)
|
Local0 &= Local1
|
||||||
WRIT(0, 0x0c, Local0)
|
WRIT(0, 0x0c, Local0)
|
||||||
|
|
||||||
Store(READ(0, 0x02, 0xff), Local0)
|
Local0 = READ(0, 0x02, 0xff)
|
||||||
Or(Local0, 0x80, Local0)
|
Local0 |= 0x80
|
||||||
WRIT(0, 0x02, Local0)
|
WRIT(0, 0x02, Local0)
|
||||||
|
|
||||||
Store(READ(0, 0x07, 0xff), Local0)
|
Local0 = READ (0, 0x07, 0xff)
|
||||||
Not(0x20, Local1)
|
Local1 = ~0x20
|
||||||
And (Local0, Local1, Local0)
|
Local0 &= Local1
|
||||||
WRIT(0, 0x07, Local0)
|
WRIT(0, 0x07, Local0)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* D0 state - Line drivers are on */
|
/* D0 state - Line drivers are on */
|
||||||
Method (_PS0, 0)
|
Method (_PS0, 0)
|
||||||
{
|
{
|
||||||
Store(READ(0, 0x02, 0xff), Local0)
|
Local0 = READ(0, 0x02, 0xff)
|
||||||
Or(Local0, 0x80, Local0)
|
Local0 |= 0x80
|
||||||
WRIT(0, 0x02, Local0)
|
WRIT(0, 0x02, Local0)
|
||||||
|
|
||||||
Store (READ(0, 0x07, 0xff), Local0)
|
Local0 = READ (0, 0x07, 0xff)
|
||||||
Not(0x20, Local1)
|
Local1 = ~0x20
|
||||||
And(Local0, Local1, Local0)
|
Local0 &= Local1
|
||||||
WRIT(0, 0x07, Local0)
|
WRIT(0, 0x07, Local0)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* D3 State - Line drivers are off */
|
/* D3 State - Line drivers are off */
|
||||||
Method(_PS3, 0)
|
Method(_PS3, 0)
|
||||||
{
|
{
|
||||||
Store(READ(0, 0x02, 0xff), Local0)
|
Local0 = READ(0, 0x02, 0xff)
|
||||||
Not(0x80, Local1)
|
Local1 = ~0x80
|
||||||
And(Local0, Local1, Local0)
|
Local0 &= Local1
|
||||||
WRIT(0, 0x02, Local0)
|
WRIT(0, 0x02, Local0)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -43,18 +43,18 @@ Scope (\_TZ)
|
||||||
Method (_TMP, 0, Serialized)
|
Method (_TMP, 0, Serialized)
|
||||||
{
|
{
|
||||||
If (\_SB.PCI0.LPCB.EC0.ALRC) {
|
If (\_SB.PCI0.LPCB.EC0.ALRC) {
|
||||||
Store(0, \_SB.PCI0.LPCB.EC0.ALRC)
|
\_SB.PCI0.LPCB.EC0.ALRC = 0
|
||||||
Return(_AC0())
|
Return(_AC0())
|
||||||
}
|
}
|
||||||
|
|
||||||
If (\_SB.PCI0.LPCB.EC0.ALRL) {
|
If (\_SB.PCI0.LPCB.EC0.ALRL) {
|
||||||
Store(0, THRO)
|
THRO = 0
|
||||||
Store(0, \_SB.PCI0.LPCB.EC0.ALRL)
|
\_SB.PCI0.LPCB.EC0.ALRL = 0
|
||||||
}
|
}
|
||||||
|
|
||||||
If (\_SB.PCI0.LPCB.EC0.ALRH) {
|
If (\_SB.PCI0.LPCB.EC0.ALRH) {
|
||||||
Store(1, THRO)
|
THRO = 1
|
||||||
Store(0, \_SB.PCI0.LPCB.EC0.ALRH)
|
\_SB.PCI0.LPCB.EC0.ALRH = 0
|
||||||
}
|
}
|
||||||
|
|
||||||
/* vendor BIOS reports 0K if TCPU >= 128 deg C ?!? */
|
/* vendor BIOS reports 0K if TCPU >= 128 deg C ?!? */
|
||||||
|
|
Loading…
Reference in New Issue