From 540a66404591ef41e2581df01647e5788ef0c808 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Sun, 10 Feb 2019 20:14:57 +0100 Subject: [PATCH] cpu/x86/mtrr: Fix _FROM_4G_TOP() macro MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This macro was unnecessarily complex. Trying to avoid an overflow for unknown reasons, and instead shifted the result into the sign bit in C. Using a plain number literal that forces C to use an adequate integer type seems to be safe. We start with 0xffffffff, subtract `x` and add 1 again. Turned out to be a common pattern and can't overflow for any positive 32-bit `x`. Change-Id: Ibb0c5b88a6e42d3ef2990196a5b99ace90ea8ee8 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/31322 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/include/cpu/x86/mtrr.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h index eb7d78d1c5..49ed462952 100644 --- a/src/include/cpu/x86/mtrr.h +++ b/src/include/cpu/x86/mtrr.h @@ -150,7 +150,7 @@ static inline unsigned int fls(unsigned int x) #define _ALIGN_DOWN_POW2(x) ((x) & ~_POW2_MASK(x)) /* Calculate `4GiB - x` (e.g. absolute address for offset from 4GiB) */ -#define _FROM_4G_TOP(x) (((1 << 20) - ((x) >> 12)) << 12) +#define _FROM_4G_TOP(x) ((0xffffffff - (x)) + 1) /* At the end of romstage, low RAM 0..CACHE_TM_RAMTOP may be set * as write-back cacheable to speed up ramstage decompression.