drivers/pc80/tpm: Remove LPC_TPM
Replace uses with MAINBOARD_HAS_LPC_TPM, if drivers/pc80/tpm is present in devicetree.cb it is necessary to always include the driver in the build. Change-Id: I9ab921ab70f7b527a52fbf5f775aa063d9a706ce Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41872 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michael Niewöhner
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@ -12,7 +12,6 @@ CONFIG_NO_POST=y
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CONFIG_GBE_BIN_PATH="site-local/gbe.bin"
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CONFIG_PCIEXP_CLK_PM=y
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CONFIG_PCIEXP_L1_SUB_STATE=y
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CONFIG_LPC_TPM=y
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CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
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CONFIG_PAYLOAD_NONE=y
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CONFIG_ONBOARD_VGA_IS_PRIMARY=y
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@ -12,7 +12,6 @@ CONFIG_NO_POST=y
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CONFIG_GBE_BIN_PATH="site-local/gbe.bin"
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CONFIG_PCIEXP_CLK_PM=y
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CONFIG_PCIEXP_L1_SUB_STATE=y
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CONFIG_LPC_TPM=y
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CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
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CONFIG_PAYLOAD_NONE=y
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CONFIG_ONBOARD_VGA_IS_PRIMARY=y
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@ -12,7 +12,6 @@ CONFIG_NO_POST=y
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CONFIG_GBE_BIN_PATH="site-local/gbe.bin"
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CONFIG_PCIEXP_CLK_PM=y
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CONFIG_PCIEXP_L1_SUB_STATE=y
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CONFIG_LPC_TPM=y
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CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
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CONFIG_PAYLOAD_NONE=y
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CONFIG_ONBOARD_VGA_IS_PRIMARY=y
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@ -12,7 +12,6 @@ CONFIG_NO_POST=y
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CONFIG_GBE_BIN_PATH="site-local/gbe.bin"
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CONFIG_PCIEXP_CLK_PM=y
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CONFIG_PCIEXP_L1_SUB_STATE=y
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CONFIG_LPC_TPM=y
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CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
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CONFIG_PAYLOAD_NONE=y
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CONFIG_ONBOARD_VGA_IS_PRIMARY=y
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@ -12,7 +12,6 @@ CONFIG_NO_POST=y
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CONFIG_GBE_BIN_PATH="site-local/gbe.bin"
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CONFIG_PCIEXP_CLK_PM=y
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CONFIG_PCIEXP_L1_SUB_STATE=y
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CONFIG_LPC_TPM=y
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CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
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CONFIG_PAYLOAD_NONE=y
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CONFIG_ONBOARD_VGA_IS_PRIMARY=y
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@ -12,7 +12,6 @@ CONFIG_NO_POST=y
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CONFIG_GBE_BIN_PATH="site-local/gbe.bin"
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CONFIG_PCIEXP_CLK_PM=y
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CONFIG_PCIEXP_L1_SUB_STATE=y
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CONFIG_LPC_TPM=y
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CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
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CONFIG_PAYLOAD_NONE=y
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CONFIG_ONBOARD_VGA_IS_PRIMARY=y
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@ -12,7 +12,6 @@ CONFIG_NO_POST=y
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CONFIG_GBE_BIN_PATH="site-local/gbe.bin"
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CONFIG_PCIEXP_CLK_PM=y
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CONFIG_PCIEXP_L1_SUB_STATE=y
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CONFIG_LPC_TPM=y
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CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
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CONFIG_PAYLOAD_NONE=y
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CONFIG_ONBOARD_VGA_IS_PRIMARY=y
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@ -12,7 +12,6 @@ CONFIG_NO_POST=y
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CONFIG_GBE_BIN_PATH="site-local/gbe.bin"
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CONFIG_PCIEXP_CLK_PM=y
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CONFIG_PCIEXP_L1_SUB_STATE=y
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CONFIG_LPC_TPM=y
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CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
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CONFIG_PAYLOAD_NONE=y
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CONFIG_ONBOARD_VGA_IS_PRIMARY=y
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@ -1,13 +1,14 @@
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config LPC_TPM
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config MAINBOARD_HAS_LPC_TPM
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bool
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default n
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help
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LPC TPM driver is enabled!
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Board has LPC TPM support
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if MAINBOARD_HAS_LPC_TPM
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config TPM_TIS_BASE_ADDRESS
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hex
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default 0xfed40000
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depends on LPC_TPM
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help
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This can be used to adjust the TPM memory base address.
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The default is specified by the TCG PC Client Specific TPM
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@ -17,14 +18,8 @@ config TPM_TIS_BASE_ADDRESS
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config TPM_PIRQ
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hex
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default 0x0
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depends on LPC_TPM
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help
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This can be used to specify a PIRQ to use instead of SERIRQ,
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which is needed for SPI TPM interrupt support on x86.
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config MAINBOARD_HAS_LPC_TPM
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bool
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default n
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select LPC_TPM
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help
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Board has LPC TPM support
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endif
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@ -1,4 +1,4 @@
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verstage-$(CONFIG_LPC_TPM) += tis.c
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romstage-$(CONFIG_LPC_TPM) += tis.c
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ramstage-$(CONFIG_LPC_TPM) += tis.c
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postcar-$(CONFIG_LPC_TPM) += tis.c
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verstage-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c
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romstage-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c
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ramstage-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c
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postcar-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c
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@ -82,7 +82,7 @@ config DEBUG_TPM
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config TPM_RDRESP_NEED_DELAY
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bool "Enable Delay Workaround for TPM"
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default n
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depends on LPC_TPM
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depends on MAINBOARD_HAS_LPC_TPM
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help
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Certain TPMs seem to need some delay when reading response
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to work around a race-condition-related issue, possibly
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