From 542fa6de384d4b79d8964512b4088bcd90863bd2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Tue, 7 Jan 2020 02:18:02 +0200
Subject: [PATCH] soc/intel/baytrail: Add SOUTHBRIDGE_INTEL_COMMON_SMBUS
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Change-Id: Ie026b8c57046d951752158fd28277e338ed1421c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38236
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/baytrail/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 4e9223750e..1fd9c4072c 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -18,6 +18,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	select HAVE_SMI_HANDLER
 	select SOUTHBRIDGE_INTEL_COMMON_RESET
+	select SOUTHBRIDGE_INTEL_COMMON_SMBUS
 	select SOUTHBRIDGE_INTEL_COMMON_SPI_SILVERMONT
 	select NO_FIXED_XIP_ROM_SIZE
 	select PARALLEL_MP