amd/stoneyridge,picasso: Open TSEG earlier
Don't make assumptions about which subregion will be accessed first. Change-Id: I558fa4acc5068014b3748be6fc1bc34999054c0a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34775 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -111,6 +111,7 @@ static void clear_tvalid(void)
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int smm_subregion(int sub, uintptr_t *start, size_t *size)
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int smm_subregion(int sub, uintptr_t *start, size_t *size)
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{
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{
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static int once;
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uintptr_t sub_base;
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uintptr_t sub_base;
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size_t sub_size;
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size_t sub_size;
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const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
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const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
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@ -118,6 +119,11 @@ int smm_subregion(int sub, uintptr_t *start, size_t *size)
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smm_region(&sub_base, &sub_size);
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smm_region(&sub_base, &sub_size);
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assert(sub_size > CONFIG_SMM_RESERVED_SIZE);
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assert(sub_size > CONFIG_SMM_RESERVED_SIZE);
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if (!once) {
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clear_tvalid();
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once = 1;
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}
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switch (sub) {
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switch (sub) {
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case SMM_SUBREGION_HANDLER:
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case SMM_SUBREGION_HANDLER:
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/* Handler starts at the base of TSEG. */
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/* Handler starts at the base of TSEG. */
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@ -127,7 +133,6 @@ int smm_subregion(int sub, uintptr_t *start, size_t *size)
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/* External cache is in the middle of TSEG. */
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/* External cache is in the middle of TSEG. */
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sub_base += sub_size - cache_size;
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sub_base += sub_size - cache_size;
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sub_size = cache_size;
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sub_size = cache_size;
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clear_tvalid();
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break;
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break;
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default:
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default:
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*start = 0;
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*start = 0;
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@ -111,6 +111,7 @@ static void clear_tvalid(void)
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int smm_subregion(int sub, uintptr_t *start, size_t *size)
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int smm_subregion(int sub, uintptr_t *start, size_t *size)
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{
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{
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static int once;
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uintptr_t sub_base;
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uintptr_t sub_base;
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size_t sub_size;
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size_t sub_size;
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const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
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const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
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@ -118,6 +119,11 @@ int smm_subregion(int sub, uintptr_t *start, size_t *size)
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smm_region(&sub_base, &sub_size);
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smm_region(&sub_base, &sub_size);
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assert(sub_size > CONFIG_SMM_RESERVED_SIZE);
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assert(sub_size > CONFIG_SMM_RESERVED_SIZE);
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if (!once) {
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clear_tvalid();
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once = 1;
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}
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switch (sub) {
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switch (sub) {
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case SMM_SUBREGION_HANDLER:
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case SMM_SUBREGION_HANDLER:
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/* Handler starts at the base of TSEG. */
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/* Handler starts at the base of TSEG. */
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@ -127,7 +133,6 @@ int smm_subregion(int sub, uintptr_t *start, size_t *size)
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/* External cache is in the middle of TSEG. */
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/* External cache is in the middle of TSEG. */
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sub_base += sub_size - cache_size;
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sub_base += sub_size - cache_size;
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sub_size = cache_size;
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sub_size = cache_size;
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clear_tvalid();
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break;
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break;
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default:
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default:
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*start = 0;
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*start = 0;
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