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amd/stoneyridge,picasso: Open TSEG earlier 

Don't make assumptions about which subregion will
be accessed first.

Change-Id: I558fa4acc5068014b3748be6fc1bc34999054c0a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34775
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2019-08-06 22:14:34 +03:00
parent 6bbabef388
commit 544369ebf3
2 changed files with 12 additions and 2 deletions
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7
src/soc/amd/picasso/ramtop.c
View File

@ -111,6 +111,7 @@ static void clear_tvalid(void)
int smm_subregion(int sub, uintptr_t *start, size_t *size)
{
static int once;
uintptr_t sub_base;
size_t sub_size;
const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
@ -118,6 +119,11 @@ int smm_subregion(int sub, uintptr_t *start, size_t *size)
smm_region(&sub_base, &sub_size);
assert(sub_size > CONFIG_SMM_RESERVED_SIZE);
if (!once) {
clear_tvalid();
once = 1;
}
switch (sub) {
case SMM_SUBREGION_HANDLER:
/* Handler starts at the base of TSEG. */
@ -127,7 +133,6 @@ int smm_subregion(int sub, uintptr_t *start, size_t *size)
/* External cache is in the middle of TSEG. */
sub_base += sub_size - cache_size;
sub_size = cache_size;
clear_tvalid();
break;
default:
*start = 0;

7
src/soc/amd/stoneyridge/ramtop.c
View File

@ -111,6 +111,7 @@ static void clear_tvalid(void)
int smm_subregion(int sub, uintptr_t *start, size_t *size)
{
static int once;
uintptr_t sub_base;
size_t sub_size;
const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
@ -118,6 +119,11 @@ int smm_subregion(int sub, uintptr_t *start, size_t *size)
smm_region(&sub_base, &sub_size);
assert(sub_size > CONFIG_SMM_RESERVED_SIZE);
if (!once) {
clear_tvalid();
once = 1;
}
switch (sub) {
case SMM_SUBREGION_HANDLER:
/* Handler starts at the base of TSEG. */
@ -127,7 +133,6 @@ int smm_subregion(int sub, uintptr_t *start, size_t *size)
/* External cache is in the middle of TSEG. */
sub_base += sub_size - cache_size;
sub_size = cache_size;
clear_tvalid();
break;
default:
*start = 0;