superio/ite: Add it8528e
* Add support for the SuperIO part of IT8528E * Based on the IT8528E datasheet and tests on vendor firmware TODO: Add support for accessing EC space, which should be implemented in src/ec/ instead, as it's a separate logical unit. No datasheet is publicy available. Tested on wedge100s. The serial works under the OS without CONFIG_CONSOLE_SERIAL. Change-Id: I72aa756e123d6f99d9ef4fe955c4b7f1be25d547 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/30957 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Patrick Rudolph
Felix Held
parent
2b218e3e51
commit
5449007425
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@ -20,6 +20,7 @@ romstage-$(CONFIG_SUPERIO_ITE_COMMON_PRE_RAM) += common/early_serial.c
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## include generic ite environment controller driver
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ramstage-$(CONFIG_SUPERIO_ITE_ENV_CTRL) += common/env_ctrl.c
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subdirs-y += it8528e
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subdirs-y += it8623e
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subdirs-y += it8671f
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subdirs-y += it8712f
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@ -0,0 +1,18 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2019 9Elements GmbH <patrick.rudolph@9elements.com>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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config SUPERIO_ITE_IT8528E
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bool
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select SUPERIO_ITE_COMMON_PRE_RAM
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@ -0,0 +1,17 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2019 9Elements GmbH <patrick.rudolph@9elements.com>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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ramstage-$(CONFIG_SUPERIO_ITE_IT8528E) += superio.c
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@ -0,0 +1,37 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2019 9Elements GmbH <patrick.rudolph@9elements.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef SUPERIO_ITE_IT8528E_H
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#define SUPERIO_ITE_IT8528E_H
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#define IT8528E_SP1 0x01 /* Com1 */
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#define IT8528E_SP2 0x02 /* Com2 */
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#define IT8528E_SWUC 0x04 /* System Wake-Up */
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#define IT8528E_KBCM 0x05 /* PS/2 mouse */
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#define IT8528E_KBCK 0x06 /* PS/2 keyboard */
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#define IT8528E_IR 0x0a /* Consumer IR */
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#define IT8528E_SMFI 0x0f /* Shared Memory/Flash Interface */
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#define IT8528E_RTCT 0x10 /* RTC-like Timer */
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#define IT8528E_PMC1 0x11 /* Power Management Channel 1 */
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#define IT8528E_PMC2 0x12 /* Power Management Channel 2 */
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#define IT8528E_SSPI 0x13 /* Serial Periphial Interface */
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#define IT8528E_PECI 0x14 /* Platform EC Interface */
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#define IT8528E_PMC3 0x17 /* Power Management Channel 3 */
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#define IT8528E_PMC4 0x18 /* Power Management Channel 4 */
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#define IT8528E_PMC5 0x19 /* Power Management Channel 5 */
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#endif /* SUPERIO_ITE_IT8528E_H */
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@ -0,0 +1,73 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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* Copyright (C) 2007 Philipp Degler <pdegler@rumms.uni-mannheim.de>
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* Copyright (C) 2017 Gergely Kiss <mail.gery@gmail.com>
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* Copyright (C) 2019 9Elements GmbH <patrick.rudolph@9elements.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <device/device.h>
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#include <device/pnp.h>
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#include <arch/io.h>
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#include <stdlib.h>
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#include <superio/conf_mode.h>
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#include "it8528e.h"
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static void it8528e_init(struct device *dev)
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{
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}
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static struct device_operations ops = {
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.read_resources = pnp_read_resources,
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.set_resources = pnp_set_resources,
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.enable_resources = pnp_enable_resources,
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.enable = pnp_alt_enable,
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.init = it8528e_init,
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.ops_pnp_mode = &pnp_conf_mode_870155_aa,
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};
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static struct pnp_info pnp_dev_info[] = {
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{ NULL, IT8528E_SP1, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
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{ NULL, IT8528E_SP2, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
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{ NULL, IT8528E_SWUC, PNP_IO0 | PNP_IRQ0, 0xfff0, },
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{ NULL, IT8528E_KBCM, PNP_IRQ0, },
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/* Documentation: Program io0 = 0x60 and io1 = 0x64 */
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{ NULL, IT8528E_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff, },
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{ NULL, IT8528E_IR, PNP_IO0 | PNP_IRQ0, 0xfff8, },
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{ NULL, IT8528E_SMFI, PNP_IO0 | PNP_IRQ0, 0xfff0, },
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/* Documentation: Program io0 = 0x70 and io1 = 0x272 */
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{ NULL, IT8528E_RTCT, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IO3 | PNP_IRQ0,
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0xfffe, 0xfffe, 0xfffe, 0xfffe},
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/* Documentation: Program io0 = 0x62 and io1 = 0x66 */
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{ NULL, IT8528E_PMC1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff },
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{ NULL, IT8528E_PMC2, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IRQ0, 0x07fc,
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0x07fc, 0xfff0 },
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/* Documentation is unclear if PMC3-5 have LPC I/O decoding support */
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{ NULL, IT8528E_PMC3, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff },
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{ NULL, IT8528E_PMC4, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff },
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{ NULL, IT8528E_PMC5, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff },
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{ NULL, IT8528E_SSPI, PNP_IO0 | PNP_IRQ0, 0xfff8 },
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{ NULL, IT8528E_PECI, PNP_IO0, 0xfff8 },
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};
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static void enable_dev(struct device *dev)
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{
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pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
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}
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struct chip_operations superio_ite_it8528e_ops = {
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CHIP_NAME("ITE IT8528E Super I/O")
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.enable_dev = enable_dev,
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};
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