soc/intel/apollolake: Add APL CPU device ID

Add Apollo Lake CPU device ID for E0 stepping.

Change-Id: I28fa222cd28b783d22c347cdbbd769e66bf10c30
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/22149
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/soc/intel/apollolake/cpu.c

@@ -106,6 +106,7 @@ static struct device_operations cpu_dev_ops = {
 static struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, CPUID_APOLLOLAKE_A0 },
 	{ X86_VENDOR_INTEL, CPUID_APOLLOLAKE_B0 },
+	{ X86_VENDOR_INTEL, CPUID_APOLLOLAKE_E0 },
 	{ X86_VENDOR_INTEL, CPUID_GLK_A0 },
 	{ X86_VENDOR_INTEL, CPUID_GLK_B0 },
 	{ 0, 0 },

src/soc/intel/apollolake/include/soc/cpu.h

@@ -18,11 +18,6 @@
 #ifndef _SOC_APOLLOLAKE_CPU_H_
 #define _SOC_APOLLOLAKE_CPU_H_
 
-#define CPUID_APOLLOLAKE_A0	0x506c8
-#define CPUID_APOLLOLAKE_B0	0x506c9
-#define CPUID_GLK_A0		0x706a0
-#define CPUID_GLK_B0		0x706a1
-
 /* Common Timer Copy (CTC) frequency - 19.2MHz. */
 #define CTC_FREQ		19200000
 

src/soc/intel/common/block/cpu/mp_init.c

@@ -65,6 +65,7 @@ static struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, CPUID_CANNONLAKE_C0 },
 	{ X86_VENDOR_INTEL, CPUID_APOLLOLAKE_A0 },
 	{ X86_VENDOR_INTEL, CPUID_APOLLOLAKE_B0 },
+	{ X86_VENDOR_INTEL, CPUID_APOLLOLAKE_E0 },
 	{ X86_VENDOR_INTEL, CPUID_GLK_A0 },
 	{ X86_VENDOR_INTEL, CPUID_GLK_B0 },
 	{ 0, 0 },

src/soc/intel/common/block/include/intelblocks/mp_init.h

@@ -33,6 +33,7 @@
 #define CPUID_CANNONLAKE_C0	0x60662
 #define CPUID_APOLLOLAKE_A0	0x506c8
 #define CPUID_APOLLOLAKE_B0	0x506c9
+#define CPUID_APOLLOLAKE_E0	0x506ca
 #define CPUID_GLK_A0		0x706a0
 #define CPUID_GLK_B0		0x706a1