drivers/i2c: Add i2c TPM support for different stages

Change-Id: Ib0839933f8b59f0c87cdda4e5374828bd6f1099f
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/23759
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>

src/drivers/i2c/designware/Makefile.inc

@@ -4,5 +4,6 @@ bootblock-y += dw_i2c.c
 romstage-y += dw_i2c.c
 verstage-y += dw_i2c.c
 ramstage-y += dw_i2c.c
+postcar-y += dw_i2c.c
 
 endif

src/mainboard/google/gale/Makefile.inc

@@ -32,6 +32,7 @@ romstage-y += cdp.c
 romstage-y += chromeos.c
 romstage-y += mmu.c
 romstage-y += reset.c
+romstage-y += blsp.c
 
 ramstage-y += boardid.c
 ramstage-y += cdp.c

src/mainboard/google/storm/Makefile.inc

@@ -30,6 +30,7 @@ romstage-y += cdp.c
 romstage-y += chromeos.c
 romstage-y += mmu.c
 romstage-y += reset.c
+romstage-y += gsbi.c
 
 ramstage-y += boardid.c
 ramstage-y += cdp.c

src/soc/intel/apollolake/Makefile.inc

@@ -71,6 +71,7 @@ ramstage-y += sd.c
 postcar-y += memmap.c
 postcar-y += mmap_boot.c
 postcar-y += spi.c
+postcar-y += i2c.c
 postcar-$(CONFIG_SOC_UART_DEBUG) += uart.c
 
 postcar-$(CONFIG_FSP_CAR) += exit_car_fsp.S

src/soc/intel/cannonlake/Makefile.inc

@@ -65,6 +65,9 @@ smm-$(CONFIG_UART_DEBUG) += uart.c
 
 postcar-y += memmap.c
 postcar-y += pmutil.c
+postcar-y += i2c.c
+postcar-y += gspi.c
+postcar-y += spi.c
 postcar-$(CONFIG_UART_DEBUG) += uart.c
 
 verstage-y += gspi.c

src/soc/intel/common/Makefile.inc

@@ -30,6 +30,7 @@ bootblock-$(CONFIG_TPM_CR50) += tpm_tis.c
 verstage-$(CONFIG_TPM_CR50) += tpm_tis.c
 romstage-$(CONFIG_TPM_CR50) += tpm_tis.c
 ramstage-$(CONFIG_TPM_CR50) += tpm_tis.c
+postcar-$(CONFIG_TPM_CR50) += tpm_tis.c
 
 ifeq ($(CONFIG_MMA),y)
 MMA_BLOBS_PATH = $(call strip_quotes,$(CONFIG_MMA_BLOBS_PATH))

src/soc/intel/common/block/i2c/Makefile.inc

@@ -3,6 +3,7 @@ ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_I2C),y)
 bootblock-y += i2c.c
 romstage-y += i2c.c
 verstage-y += i2c.c
+postcar-y += i2c.c
 ramstage-y += i2c.c
 
 endif

src/soc/intel/common/block/lpss/Makefile.inc

@@ -2,4 +2,5 @@ bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c
 verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c
+postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c
 smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c

src/soc/intel/common/block/pmc/Makefile.inc

@@ -5,4 +5,5 @@ ramstage-y += pmc.c
 ramstage-y += pmclib.c
 smm-y += pmclib.c
 verstage-y += pmclib.c
+postcar-y += pmclib.c
 endif

src/soc/intel/skylake/Makefile.inc

@@ -78,6 +78,7 @@ smm-$(CONFIG_UART_DEBUG) += uart.c
 postcar-y += memmap.c
 postcar-y += gspi.c
 postcar-y += spi.c
+postcar-y += i2c.c
 postcar-$(CONFIG_UART_DEBUG) += uart.c
 
 # cpu_microcode_bins += ???

src/soc/mediatek/mt8173/Makefile.inc

@@ -50,6 +50,7 @@ romstage-$(CONFIG_SPI_FLASH) += flash_controller.c
 romstage-y += ../common/pll.c pll.c
 romstage-y += ../common/timer.c
 romstage-y += timer.c
+romstage-y += i2c.c
 
 romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
 romstage-y += ../common/cbmem.c

src/soc/qualcomm/ipq40xx/Makefile.inc

@@ -38,6 +38,9 @@ romstage-$(CONFIG_SPI_FLASH) += spi.c
 romstage-y += timer.c
 romstage-$(CONFIG_DRIVERS_UART) += uart.c
 romstage-y += cbmem.c
+romstage-y += i2c.c
+romstage-y += blsp.c
+romstage-y += qup.c
 
 ramstage-y += blobs_init.c
 ramstage-y += cbmem.c

src/soc/qualcomm/ipq806x/Makefile.inc

@@ -37,6 +37,9 @@ romstage-$(CONFIG_SPI_FLASH) += spi.c
 romstage-y += timer.c
 romstage-$(CONFIG_DRIVERS_UART) += uart.c
 romstage-y += cbmem.c
+romstage-y += i2c.c
+romstage-y += gsbi.c
+romstage-y += qup.c
 
 ramstage-y += blobs_init.c
 ramstage-y += cbmem.c

src/soc/rockchip/rk3288/Makefile.inc

@@ -54,6 +54,7 @@ romstage-y += sdram.c
 romstage-y += ../common/rk808.c
 romstage-y += ../common/pwm.c
 romstage-y += tsadc.c
+romstage-y += ../common/i2c.c
 
 ramstage-y += soc.c
 ramstage-y += ../common/cbmem.c

src/soc/rockchip/rk3399/Makefile.inc

@@ -57,6 +57,7 @@ romstage-y += usb.c
 romstage-y += gpio.c
 romstage-y += saradc.c
 romstage-y += ../common/gpio.c
+romstage-y += ../common/i2c.c
 
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