soc/intel/denverton_ns: Update UART legacy mode to keep FSP traces

The FSP can only output its traces when the HSUART PCI device is
available.

- Move the hiding to after last FSP call.
- Adapt coreboot PCI enumeration to keep the legacy configuration.

With UART configured as legacy Linux will not re-enumerate it but detects
it as legacy (ttyS0 instead of ttyS4).

Change-Id: Id8801e178ffd8eeee78ece07da7bd6b8dbd88538
Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net>
Reviewed-on: https://review.coreboot.org/23623
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Julien Viard de Galbert 2018-03-05 11:10:16 +01:00 committed by Nico Huber
parent 7b37668650
commit 546923f906
2 changed files with 39 additions and 9 deletions

View File

@ -65,15 +65,6 @@ static void pci_early_hsuart_device_probe(u8 bus, u8 dev, u8 func,
SIZE_OF_HSUART_RES * func + PSR_OFFSET); SIZE_OF_HSUART_RES * func + PSR_OFFSET);
*psr_reg >>= 1; *psr_reg >>= 1;
#endif #endif
#if (IS_ENABLED(CONFIG_LEGACY_UART_MODE))
/* Hide HSUART on PCI to prevent re-enumeration
* and enable legacy mode.
*/
pci_write_config32(uart_dev, PCI_FUNC_RDCFG_HIDE,
pci_read_config32(uart_dev, PCI_FUNC_RDCFG_HIDE) |
1);
#endif
} }
static void early_config_gpio(void) static void early_config_gpio(void)

View File

@ -26,11 +26,26 @@
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <soc/pci_devs.h> #include <soc/pci_devs.h>
#include <console/console.h> #include <console/console.h>
#include <soc/uart.h>
#include <fsp/api.h>
static void dnv_ns_uart_read_resources(struct device *dev) static void dnv_ns_uart_read_resources(struct device *dev)
{ {
/* read resources to be visible in the log*/ /* read resources to be visible in the log*/
pci_dev_read_resources(dev); pci_dev_read_resources(dev);
if (!IS_ENABLED(CONFIG_LEGACY_UART_MODE))
return;
struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res == NULL)
return;
res->size = 0x8;
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
/* Do not configure membar */
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res != NULL)
res->flags = 0;
compact_resources(dev);
} }
static struct device_operations uart_ops = { static struct device_operations uart_ops = {
@ -51,3 +66,27 @@ static const struct pci_driver uart_driver __pci_driver = {
.vendor = PCI_VENDOR_ID_INTEL, .vendor = PCI_VENDOR_ID_INTEL,
.devices = uart_ids .devices = uart_ids
}; };
static void hide_hsuarts(void)
{
int i;
printk(BIOS_DEBUG, "HIDING HSUARTs.\n");
/* There is a hardware requirement to hide functions starting from the
last one. */
for (i = DENVERTON_UARTS_TO_INI - 1; i >= 0; i--) {
struct device *uart_dev;
uart_dev = dev_find_slot(0, PCI_DEVFN(HSUART_DEV, i));
if (uart_dev == NULL)
continue;
pci_or_config32(uart_dev, PCI_FUNC_RDCFG_HIDE, 1);
}
}
/* Hide HSUART PCI device very last when FSP no longer needs it */
void platform_fsp_notify_status(enum fsp_notify_phase phase)
{
if (phase != END_OF_FIRMWARE)
return;
if (IS_ENABLED(CONFIG_LEGACY_UART_MODE))
hide_hsuarts();
}