soc/intel/common/gpio: Add function to read GPIO TX value
This function reads out the current value set to output for a GPIO pin. Ex: GPP_E0 is set to output int e0_val; e0_val = gpio_tx_get(GPP_E0); Signed-off-by: Cliff Huang <cliff.huang@intel.com> Change-Id: Ib02b9ab50d378eb163d91aed1576428b49cec2cf Reviewed-on: https://review.coreboot.org/c/coreboot/+/72127 Reviewed-by: Anil Kumar K <anil.kumar.k@intel.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
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@ -14,6 +14,7 @@ _Static_assert(sizeof(gpio_t) <= sizeof(u32), "gpio_t doesn't fit in lb_gpio");
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/* The following functions must be implemented by SoC/board code. */
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int gpio_get(gpio_t gpio);
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int gpio_tx_get(gpio_t gpio);
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void gpio_set(gpio_t gpio, int value);
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void gpio_input_pulldown(gpio_t gpio);
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void gpio_input_pullup(gpio_t gpio);
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@ -523,6 +523,18 @@ int gpio_get(gpio_t gpio_num)
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return !!(reg & PAD_CFG0_RX_STATE);
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}
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int gpio_tx_get(gpio_t gpio_num)
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{
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const struct pad_community *comm = gpio_get_community(gpio_num);
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uint16_t config_offset;
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uint32_t reg;
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config_offset = pad_config_offset(comm, gpio_num);
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reg = pcr_read32(comm->port, config_offset);
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return !!(reg & PAD_CFG0_TX_STATE);
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}
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static void
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gpio_pad_config_lock_using_sbi(const struct gpio_lock_config *pad_info,
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uint8_t pid, uint16_t offset, const uint32_t bit_mask)
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