diff --git a/src/soc/amd/cezanne/romstage.c b/src/soc/amd/cezanne/romstage.c index 573b353c79..d3e1bd7a65 100644 --- a/src/soc/amd/cezanne/romstage.c +++ b/src/soc/amd/cezanne/romstage.c @@ -9,16 +9,12 @@ #include #include #include -#include asmlinkage void car_stage_entry(void) { post_code(0x40); console_init(); - if (CONFIG(VBOOT_EARLY_EC_SYNC)) - vboot_sync_ec(); - post_code(0x41); /* Snapshot chipset state prior to any FSP call */