parade/ps8640: add delay to every loop when polling ps8640 ready

Add delay before and in polling ps8640 ready to reduce the frequency
of polling.

BUG=chrome-os-partner:54897
BRANCH=none
TEST=build pass elm and show ui

Change-Id: I43c833af910490e53496a343330a6a6af35623a9
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: bc8c3d6f7cf0b2da693a465cf3845e8bbc53825a
Original-Change-Id: I5c725eed8110ff9f545c1142ca28bcff336b6860
Original-Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/371718
Original-Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Original-Tested-by: jitao shi <jitao.shi@mediatek.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-on: https://review.coreboot.org/16364
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Jitao Shi 2016-08-17 10:21:37 +08:00 committed by Martin Roth
parent a4e7165fd1
commit 54aa89c7b4

View file

@ -60,16 +60,22 @@ int ps8640_init(uint8_t bus, uint8_t chip)
u8 set_vdo_done;
struct stopwatch sw;
stopwatch_init_msecs_expire(&sw, 350);
mdelay(200);
stopwatch_init_msecs_expire(&sw, 200);
do {
while (true) {
i2c_readb(bus, chip + 2, PAGE2_GPIO_H, &set_vdo_done);
if ((set_vdo_done & PS_GPIO9) == PS_GPIO9)
break;
if (stopwatch_expired(&sw)) {
printk(BIOS_INFO, "Failed to init ps8640.\n");
return -1;
}
} while ((set_vdo_done & PS_GPIO9) != PS_GPIO9);
mdelay(20);
}
mdelay(50);
i2c_writeb(bus, chip + 3, PAGE3_SET_ADD, VDO_CTL_ADD);
i2c_writeb(bus, chip + 3, PAGE3_SET_VAL, VDO_DIS);
i2c_writeb(bus, chip + 3, PAGE3_SET_ADD, VDO_CTL_ADD);