diff --git a/src/soc/amd/cezanne/acpi.c b/src/soc/amd/cezanne/acpi.c index edf20c9b6f..631f388fdf 100644 --- a/src/soc/amd/cezanne/acpi.c +++ b/src/soc/amd/cezanne/acpi.c @@ -76,6 +76,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fill_fadt_extended_pm_regs(fadt); + /* p_lvl2_lat and p_lvl3_lat match what the AGESA code does, but those values are + overridden by the _CST packages in the processor devices. */ fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->duty_offset = 0; /* Not supported */ diff --git a/src/soc/amd/glinda/acpi.c b/src/soc/amd/glinda/acpi.c index 8d6c008a96..31723b1b4f 100644 --- a/src/soc/amd/glinda/acpi.c +++ b/src/soc/amd/glinda/acpi.c @@ -79,6 +79,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fill_fadt_extended_pm_regs(fadt); + /* p_lvl2_lat and p_lvl3_lat match what the AGESA code does, but those values are + overridden by the _CST packages in the processor devices. */ fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->duty_offset = 0; /* Not supported */ diff --git a/src/soc/amd/mendocino/acpi.c b/src/soc/amd/mendocino/acpi.c index 6b20b023d5..044b345df1 100644 --- a/src/soc/amd/mendocino/acpi.c +++ b/src/soc/amd/mendocino/acpi.c @@ -78,6 +78,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fill_fadt_extended_pm_regs(fadt); + /* p_lvl2_lat and p_lvl3_lat match what the AGESA code does, but those values are + overridden by the _CST packages in the processor devices. */ fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->duty_offset = 0; /* Not supported */ diff --git a/src/soc/amd/phoenix/acpi.c b/src/soc/amd/phoenix/acpi.c index 32dde83651..09c4a15401 100644 --- a/src/soc/amd/phoenix/acpi.c +++ b/src/soc/amd/phoenix/acpi.c @@ -79,6 +79,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fill_fadt_extended_pm_regs(fadt); + /* p_lvl2_lat and p_lvl3_lat match what the AGESA code does, but those values are + overridden by the _CST packages in the processor devices. */ fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->duty_offset = 0; /* Not supported */ diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 1d5a275d42..f6fb9f259d 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -82,6 +82,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fill_fadt_extended_pm_regs(fadt); + /* p_lvl2_lat and p_lvl3_lat match what the AGESA code does, but those values are + overridden by the _CST packages in the processor devices. */ fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->duty_offset = 1; /* CLK_VAL bits 3:1 */ diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c index e2fb2e344f..3b45a5ff99 100644 --- a/src/soc/amd/stoneyridge/acpi.c +++ b/src/soc/amd/stoneyridge/acpi.c @@ -74,6 +74,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fill_fadt_extended_pm_regs(fadt); + /* p_lvl2_lat and p_lvl3_lat match what the AGESA code does, but those values are + overridden by the _CST packages in the PSTATE SSDT. */ fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->duty_offset = 1; /* CLK_VAL bits 3:1 */