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soc/intel/cannonlake: Add FSP UPD for minimum assertion width 

Expose the FSP tunables for the chipset minimum assertion width
settings which can be configured per-board.

The defaults appear to be different from what is listed in the FSP
header documentation so I tried to list what the actual default is
based on the source rather than what is stated the header comments.

Change-Id: Ie0606c2984727adf13c9fb8395586287162e49ca
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/30719
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
This commit is contained in:
Duncan Laurie 2019-01-07 12:06:07 -08:00 committed by Duncan Laurie
parent 8601a16c9e
commit 55012d149a
2 changed files with 47 additions and 0 deletions
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37
src/soc/intel/cannonlake/chip.h
View File

@ -222,6 +222,43 @@ struct soc_intel_cannonlake_config {
*/ */
uint32_t PrmrrSize; uint32_t PrmrrSize;
uint8_t PmTimerDisabled; uint8_t PmTimerDisabled;
/*
* SLP_S3 Minimum Assertion Width Policy
* 1 = 60us
* 2 = 1ms (default)
* 3 = 50ms
* 4 = 2s
*/
uint8_t PchPmSlpS3MinAssert;
/*
* SLP_S4 Minimum Assertion Width Policy
* 1 = 1s
* 2 = 2s
* 3 = 3s
* 4 = 4s (default)
*/
uint8_t PchPmSlpS4MinAssert;
/*
* SLP_SUS Minimum Assertion Width Policy
* 1 = 0ms
* 2 = 500ms
* 3 = 1s (default)
* 4 = 4s
*/
uint8_t PchPmSlpSusMinAssert;
/*
* SLP_A Minimum Assertion Width Policy
* 1 = 0ms
* 2 = 4s
* 3 = 98ms (default)
* 4 = 2s
*/
uint8_t PchPmSlpAMinAssert;
/* Desired platform debug type. */ /* Desired platform debug type. */
enum { enum {
DebugConsent_Disabled, DebugConsent_Disabled,

10
src/soc/intel/cannonlake/fsp_params.c
View File

@ -229,6 +229,16 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* Power Optimizer */ /* Power Optimizer */
params->PchPwrOptEnable = config->dmipwroptimize; params->PchPwrOptEnable = config->dmipwroptimize;
params->SataPwrOptEnable = config->satapwroptimize; params->SataPwrOptEnable = config->satapwroptimize;
/* Apply minimum assertion width settings if non-zero */
if (config->PchPmSlpS3MinAssert)
params->PchPmSlpS3MinAssert = config->PchPmSlpS3MinAssert;
if (config->PchPmSlpS4MinAssert)
params->PchPmSlpS4MinAssert = config->PchPmSlpS4MinAssert;
if (config->PchPmSlpSusMinAssert)
params->PchPmSlpSusMinAssert = config->PchPmSlpSusMinAssert;
if (config->PchPmSlpAMinAssert)
params->PchPmSlpAMinAssert = config->PchPmSlpAMinAssert;
} }
/* Mainboard GPIO Configuration */ /* Mainboard GPIO Configuration */