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mb/google/brya/anahera: Disable autonomous GPIO power management 

With cr50 fw 0.3.22 or older version, it needs to disable autonomous
GPIO power management and then can update cr50 fw successfully.

BUG=b:202246591
TEST=FW_NAME=anahera emerge-brya coreboot chromeos-bootimage.

Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Change-Id: I9137b6264ee80bc9e00dfdc3ab3926bccb4bf47c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58695
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Wisley Chen 2021-10-28 18:02:53 +06:00 committed by Tim Wawrzynczak
parent b1700805ef
commit 550bdc9050
1 changed files with 11 additions and 0 deletions
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11
src/mainboard/google/brya/variants/anahera/overridetree.cb
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@ -22,6 +22,17 @@ fw_config
end
end
chip soc/intel/alderlake
# This disables autonomous GPIO power management, otherwise
# old cr50 FW only supports short pulses; need to clarify
# the minimum PCH IRQ pulse width with Intel, b/180111628
register "gpio_override_pm" = "1"
register "gpio_pm[COMM_0]" = "0"
register "gpio_pm[COMM_1]" = "0"
register "gpio_pm[COMM_2]" = "0"
register "gpio_pm[COMM_3]" = "0"
register "gpio_pm[COMM_4]" = "0"
register "gpio_pm[COMM_5]" = "0"
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |