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soc/intel/{skl, xeon_sp}: Drop SoC specific LPC lock down configuration 

This patch drops SoC specific lpc lock down configuration as commit
63630 (soc/intel/cmn/pch/lockdown: Implement LPC lock down
configuration) implements the lpc registers lock down configuration in
common code.

BUG=b:211954778
TEST=Build.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I99ec6d63dfe9a8ac8d9846067a9afc3ef83dc1c2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63631
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This commit is contained in:
Subrata Banik 2022-04-14 14:30:38 +05:30
parent 4c6072130c
commit 5530316024
2 changed files with 0 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
src/soc/intel/skylake/lockdown.c
View File

@ -2,20 +2,10 @@
#include <device/mmio.h> #include <device/mmio.h>
#include <intelblocks/cfg.h> #include <intelblocks/cfg.h>
#include <intelblocks/lpc_lib.h>
#include <intelblocks/pmclib.h> #include <intelblocks/pmclib.h>
#include <intelpch/lockdown.h> #include <intelpch/lockdown.h>
#include <soc/pm.h> #include <soc/pm.h>
static void lpc_lockdown_config(int chipset_lockdown)
{
/* Set BIOS Interface Lock, BIOS Lock */
if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) {
lpc_set_bios_interface_lock_down();
lpc_set_lock_enable();
}
}
static void pmc_lockdown_config(void) static void pmc_lockdown_config(void)
{ {
uint8_t *pmcbase; uint8_t *pmcbase;
@ -33,9 +23,6 @@ static void pmc_lockdown_config(void)
void soc_lockdown_config(int chipset_lockdown) void soc_lockdown_config(int chipset_lockdown)
{ {
/* LPC lock down configuration */
lpc_lockdown_config(chipset_lockdown);
/* PMC lock down configuration */ /* PMC lock down configuration */
pmc_lockdown_config(); pmc_lockdown_config();
} }

11
src/soc/intel/xeon_sp/lockdown.c
View File

@ -3,21 +3,11 @@
#include <device/mmio.h> #include <device/mmio.h>
#include <device/pci.h> #include <device/pci.h>
#include <intelblocks/cfg.h> #include <intelblocks/cfg.h>
#include <intelblocks/lpc_lib.h>
#include <intelblocks/pmclib.h> #include <intelblocks/pmclib.h>
#include <intelpch/lockdown.h> #include <intelpch/lockdown.h>
#include <soc/pci_devs.h> #include <soc/pci_devs.h>
#include <soc/pm.h> #include <soc/pm.h>
static void lpc_lockdown_config(int chipset_lockdown)
{
/* Set BIOS Interface Lock, BIOS Lock */
if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) {
lpc_set_bios_interface_lock_down();
lpc_set_lock_enable();
}
}
static void pmc_lockdown_config(int chipset_lockdown) static void pmc_lockdown_config(int chipset_lockdown)
{ {
uint8_t *pmcbase; uint8_t *pmcbase;
@ -46,7 +36,6 @@ static void sata_lockdown_config(int chipset_lockdown)
void soc_lockdown_config(int chipset_lockdown) void soc_lockdown_config(int chipset_lockdown)
{ {
lpc_lockdown_config(chipset_lockdown);
pmc_lockdown_config(chipset_lockdown); pmc_lockdown_config(chipset_lockdown);
sata_lockdown_config(chipset_lockdown); sata_lockdown_config(chipset_lockdown);
} }