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nb/intel/sandybridge/raminit: Use supported CAS 

Instead of programming unsupported CAS use the highest supported
value. Start at DDR3 maximum of CAS 18T.
Increase error message verbosity level.

Useful for overclocking.

Tested on Lenovo T520 and DDR3-1600 DIMM (RMT3170eb86e9w16).
Allows to run a DDR3-1600 DIMM at 933Mhz.

Change-Id: I2e8aadd541f06fa032ad7095c9a2d5e3bb7613f3
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/15217
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
This commit is contained in:
Patrick Rudolph 2016-06-15 20:28:32 +02:00 committed by Martin Roth
parent d4c53e3fdd
commit 55409ebbb6
1 changed files with 10 additions and 2 deletions
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12
src/northbridge/intel/sandybridge/raminit.c
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@ -722,8 +722,16 @@ static void dram_timing(ramctr_timing * ctrl)
val++; val++;
} }
/* Is CAS supported */ /* Is CAS supported */
if (!(ctrl->cas_supported & (1 << (val - 4)))) if (!(ctrl->cas_supported & (1 << (val - 4)))) {
printk(BIOS_DEBUG, "CAS not supported\n"); printk(BIOS_ERR, "CAS %uT not supported. ", val);
val = 18;
/* Find highest supported CAS latency */
while (!((ctrl->cas_supported >> (val - 4)) & 1))
val--;
printk(BIOS_ERR, "Using CAS %uT instead.\n", val);
}
printk(BIOS_DEBUG, "Selected CAS latency : %uT\n", val); printk(BIOS_DEBUG, "Selected CAS latency : %uT\n", val);
ctrl->CAS = val; ctrl->CAS = val;
ctrl->CWL = get_CWL(ctrl->CAS); ctrl->CWL = get_CWL(ctrl->CAS);