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soc/intel/skylake: sort CPU_SPECIFIC_OPTIONS and drop duplicate 

ACPI_NHLT happens to be selected twice.

BRANCH=none
BUG=none
TEST=generated fizz .config does not change

Change-Id: Ic525ee07015deb88fff4c15cad9dbbeada8a4479
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://review.coreboot.org/23601
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Vadim Bendebury 2018-02-05 19:59:09 -08:00
parent 457d1c8fa2
commit 5542bb6531
1 changed files with 11 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
src/soc/intel/skylake/Kconfig
View File

@ -15,33 +15,34 @@ if SOC_INTEL_SKYLAKE
config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ACPI_NHLT
select ARCH_BOOTBLOCK_X86_32
select ARCH_RAMSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
select ARCH_VERSTAGE_X86_32
select ACPI_NHLT
select BOOTBLOCK_CONSOLE
select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE
select C_ENVIRONMENT_BOOTBLOCK
select COLLECT_TIMESTAMPS
select COMMON_FADT
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select C_ENVIRONMENT_BOOTBLOCK
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select HAVE_HARD_RESET
select HAVE_INTEL_FIRMWARE
select HAVE_MONOTONIC_TIMER
select HAVE_SMI_HANDLER
select IOAPIC
select NO_FIXED_XIP_ROM_SIZE
select MRC_SETTINGS_PROTECT
select NO_FIXED_XIP_ROM_SIZE
select PARALLEL_MP
select PARALLEL_MP_AP_WORK
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
select PCIEXP_CLK_PM
select PCIEXP_COMMON_CLOCK
select PCIEXP_L1_SUB_STATE
select PCIEX_LENGTH_64MB
select REG_SCRIPT
@ -49,6 +50,8 @@ config CPU_SPECIFIC_OPTIONS
select RELOCATABLE_RAMSTAGE
select RTC
select SA_ENABLE_DPR
select SMM_TSEG
select SMP
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK
@ -59,17 +62,17 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_EBDA
select SOC_INTEL_COMMON_BLOCK_FAST_SPI
select SOC_INTEL_COMMON_BLOCK_GPIO
select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL
select SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS
select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL
select SOC_INTEL_COMMON_BLOCK_GRAPHICS
select SOC_INTEL_COMMON_BLOCK_GSPI
select SOC_INTEL_COMMON_BLOCK_ITSS
select SOC_INTEL_COMMON_BLOCK_I2C
select SOC_INTEL_COMMON_BLOCK_ITSS
select SOC_INTEL_COMMON_BLOCK_LPC
select SOC_INTEL_COMMON_BLOCK_LPSS
select SOC_INTEL_COMMON_BLOCK_PCIE
select SOC_INTEL_COMMON_BLOCK_PMC
select SOC_INTEL_COMMON_BLOCK_PCR
select SOC_INTEL_COMMON_BLOCK_PMC
select SOC_INTEL_COMMON_BLOCK_RTC
select SOC_INTEL_COMMON_BLOCK_SA
select SOC_INTEL_COMMON_BLOCK_SATA
@ -82,19 +85,15 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_TIMER
select SOC_INTEL_COMMON_BLOCK_UART
select SOC_INTEL_COMMON_BLOCK_XHCI
select SOC_INTEL_COMMON_GFX_OPREGION
select SOC_INTEL_COMMON_NHLT
select SOC_INTEL_COMMON_RESET
select SMM_TSEG
select SMP
select SSE2
select SUPPORT_CPU_UCODE_IN_CBFS
select TSC_CONSTANT_RATE
select TSC_MONOTONIC_TIMER
select TSC_SYNC_MFENCE
select UDELAY_TSC
select ACPI_NHLT
select HAVE_FSP_GOP
select SOC_INTEL_COMMON_GFX_OPREGION
config MAINBOARD_USES_FSP2_0
bool