security/intel/stm: Check for processor STM support
Check to ensure that dual monitor mode is supported on the current processor. Dual monitor mode is normally supported on any Intel x86 processor that has VTx support. The STM is a hypervisor that executes in SMM dual monitor mode. This check should fail only in the rare case were dual monitor mode is disabled. If the check fails, then the STM will not be initialized by coreboot. Signed-off-by: Eugene D. Myers <edmyers@tycho.nsa.gov> Change-Id: I518bb2aa1bdec94b5b6d5e991d7575257f3dc6e9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38836 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -74,6 +74,7 @@
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#define MCA_STATUS_LO_ERRCODE_EXT_MASK (0x3f << MCA_STATUS_LO_ERRCODE_EXT_SH)
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#define MCA_STATUS_LO_ERRCODE_EXT_MASK (0x3f << MCA_STATUS_LO_ERRCODE_EXT_SH)
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#define MCA_STATUS_LO_ERRCODE_MASK (0xffff << 0)
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#define MCA_STATUS_LO_ERRCODE_MASK (0xffff << 0)
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#define IA32_VMX_BASIC_MSR 0x480
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#define IA32_VMX_BASIC_MSR 0x480
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#define VMX_BASIC_HI_DUAL_MONITOR (1UL << (49 - 32))
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#define IA32_VMX_MISC_MSR 0x485
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#define IA32_VMX_MISC_MSR 0x485
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#define MC0_ADDR 0x402
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#define MC0_ADDR 0x402
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#define MC0_MISC 0x403
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#define MC0_MISC 0x403
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@ -159,9 +159,20 @@ void stm_setup(uintptr_t mseg, int cpu, int num_cpus, uintptr_t smbase,
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{
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{
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msr_t InitMseg;
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msr_t InitMseg;
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msr_t MsegChk;
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msr_t MsegChk;
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msr_t vmx_basic;
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uintptr_t addr_calc; // used to calculate the stm resource heap area
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uintptr_t addr_calc; // used to calculate the stm resource heap area
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printk(BIOS_DEBUG, "STM: set up for cpu %d/%d\n", cpu, num_cpus);
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printk(BIOS_DEBUG, "STM: set up for cpu %d/%d\n", cpu, num_cpus);
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vmx_basic = rdmsr(IA32_VMX_BASIC_MSR);
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// Does this processor support an STM?
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if ((vmx_basic.hi & VMX_BASIC_HI_DUAL_MONITOR) != VMX_BASIC_HI_DUAL_MONITOR) {
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printk(BIOS_WARNING, "STM: not supported on CPU %d\n", cpu);
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return;
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}
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if (cpu == 0) {
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if (cpu == 0) {
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// need to create the BIOS resource list once
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// need to create the BIOS resource list once
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