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sandybridge/raminit: use MCHBAR32 macro everywhere 

Change-Id: I42d97d278c81ce2cfd0010830c2e0bacddd947d6
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/27675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Felix Held 2018-07-28 00:41:57 +02:00
parent b9267f0cec
commit 55823c3d36
1 changed files with 3 additions and 3 deletions
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6
src/northbridge/intel/sandybridge/raminit.c
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@ -335,10 +335,10 @@ static void init_dram_ddr3(int min_tck, int s3resume)
wrmsr(0x000002e6, (msr_t) { .lo = 0, .hi = 0 }); wrmsr(0x000002e6, (msr_t) { .lo = 0, .hi = 0 });
reg_5d10 = read32(DEFAULT_MCHBAR + 0x5d10); // !!! = 0x00000000 reg_5d10 = MCHBAR32(0x5d10); // !!! = 0x00000000
if ((pci_read_config16(SOUTHBRIDGE, 0xa2) & 0xa0) == 0x20 /* 0x0004 */ if ((pci_read_config16(SOUTHBRIDGE, 0xa2) & 0xa0) == 0x20 /* 0x0004 */
&& reg_5d10 && !s3resume) { && reg_5d10 && !s3resume) {
write32(DEFAULT_MCHBAR + 0x5d10, 0); MCHBAR32(0x5d10) = 0;
/* Need reset. */ /* Need reset. */
outb(0x6, 0xcf9); outb(0x6, 0xcf9);
@ -438,7 +438,7 @@ static void init_dram_ddr3(int min_tck, int s3resume)
die("raminit failed"); die("raminit failed");
/* FIXME: should be hardware revision-dependent. */ /* FIXME: should be hardware revision-dependent. */
write32(DEFAULT_MCHBAR + 0x5024, 0x00a030ce); MCHBAR32(0x5024) = 0x00a030ce;
set_scrambling_seed(&ctrl); set_scrambling_seed(&ctrl);