mb/google/brya: Add usb_lpm_incapable for Type-C port with PS8815

Intel ADL-P USB Type-C ports are not compatible with Parade PS8815
retimer on USB U1/U2 transition. The usb_lpm_incapable config is
used to disable USB U1/U2 transition for these Type-C ports.

This patch add usb_lpm_incapable config for the following variants
with PS8815 retimer:
 - kinox           MLB: C0
 - volmar          DB: C1
 - osiris          MLB: C0/C1
 - mithrax         DB: C1
 - felwinter       DB: C1
 - taeko           DB: C1
 - gimble          DB: C1
 - gimble4es       DB: C1
 - taniks          DB: C1
 - marasov         DB: C2
 - gaelin          MLB: C0/C1
 - skolas          DB: C1
 - skolas4es       DB: C1
 - brya0           DB: C1

BUG=b:253402457
TEST=Plug in device and check LPM sysfs nodes are disabled
localhost ~ # cat /sys/bus/usb/devices/2-X/power/usb3_hardware_lpm_u1
disabled
localhost ~ # cat /sys/bus/usb/devices/2-X/power/usb3_hardware_lpm_u2
disabled

Change-Id: Ie9246ff7908887404f49ec10ee781c8cba410557
Signed-off-by: Ron Lee <ron.lee@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71925
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Ron Lee 2022-12-13 19:48:59 +08:00 committed by Felix Held
parent e40cbcf036
commit 558952ae7c
14 changed files with 16 additions and 0 deletions

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@ -847,6 +847,7 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port2 on end
end
chip drivers/usb/acpi

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@ -348,6 +348,7 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port2 on end
end
chip drivers/usb/acpi

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@ -79,6 +79,7 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, CENTER, ACPI_PLD_GROUP(1, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
@ -86,6 +87,7 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(FRONT, LEFT, ACPI_PLD_GROUP(2, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port2 on end
end
end

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@ -280,6 +280,7 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port3 on end
end
end

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@ -244,6 +244,7 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port3 on end
end
end

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@ -337,6 +337,7 @@ chip soc/intel/alderlake
register "use_custom_pld" = "true"
register "custom_pld" =
"ACPI_PLD_TYPE_C(FRONT, RIGHT, ACPI_PLD_GROUP(1, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port1 on end
end
end

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@ -363,6 +363,7 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port3 on end
end
end

View File

@ -302,6 +302,7 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(1, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port2 on end
end
chip drivers/usb/acpi

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@ -292,6 +292,7 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
@ -299,6 +300,7 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port3 on end
end
end

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@ -847,6 +847,7 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port2 on end
end
chip drivers/usb/acpi

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@ -790,6 +790,7 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port2 on end
end
chip drivers/usb/acpi

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@ -599,6 +599,7 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port3 on
probe DB_USB DB_USB3_NO_A
probe DB_USB DB_USB3_1C_1A

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@ -418,6 +418,7 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port3 on
probe DB_USB DB_USB3_WITH_A
end

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@ -368,6 +368,7 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
register "usb_lpm_incapable" = "true"
device ref tcss_usb3_port3 on end
end
end