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sb/intel/i82371eb: Add #defines for DEVRESx registers 

These will be put to use in a follow-up.

Change-Id: Id13dde5ce2239064b9b18de7ca516525158ae268
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41638
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Keith Hui 2020-05-21 17:07:47 -04:00 committed by Patrick Georgi
parent a5a8e0962a
commit 55b1dbef3d
1 changed files with 10 additions and 0 deletions
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10
src/southbridge/intel/i82371eb/i82371eb.h
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@ -89,6 +89,16 @@ void i82371eb_early_init(void);
#define PMBA 0x40 /* Power management base address */ #define PMBA 0x40 /* Power management base address */
#define DEFAULT_PMBASE 0xe400 #define DEFAULT_PMBASE 0xe400
#define PM_IO_BASE DEFAULT_PMBASE #define PM_IO_BASE DEFAULT_PMBASE
#define DEVRESA 0X5c /* Device resource A */
#define DEVRESB 0X60 /* Device resource B */
#define DEVRESC 0X64 /* Device resource C */
#define DEVRESD 0x52 /* Device resource D */
#define DEVRESE 0x68 /* Device resource E */
#define DEVRESF 0x6c /* Device resource F */
#define DEVRESG 0x70 /* Device resource G */
#define DEVRESH 0x74 /* Device resource H */
#define DEVRESI 0x78 /* Device resource I */
#define DEVRESJ 0x7c /* Device resource J */
#define PMREGMISC 0x80 /* Miscellaneous power management */ #define PMREGMISC 0x80 /* Miscellaneous power management */
#define PMIOSE (1 << 0) /* PM I/O Space Enable */ #define PMIOSE (1 << 0) /* PM I/O Space Enable */