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mb/google/brya: Disable PCH USB2 phy power gating for primus 

The patch disables PCH USB2 Phy power gating to prevent possible display
flicker issue for primus board. Please refer Intel doc#723158 for
more information.

BUG=b:221461379
TEST=Verify the build for primus board

Signed-off-by: Casper Chang <casper_chang@wistron.corp-partner.google.com>
Change-Id: I4d7d52bdeafe8b1b55822b5c8d040c94ce1f3878
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64463
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Casper Chang 2022-05-18 19:06:09 +08:00 committed by Felix Held
parent f5cd9a15ba
commit 55c1e7f858
1 changed files with 4 additions and 0 deletions
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src/mainboard/google/brya/variants/primus/overridetree.cb
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@ -26,6 +26,10 @@ chip soc/intel/alderlake
register "sagv" = "SaGv_Enabled"
register "max_dram_speed_mts" = "3733"
# As per Intel Advisory doc#723158, the change is required to prevent possible
# display flickering issue.
register "usb2_phy_sus_pg_disable" = "1"
# Acoustic settings
register "acoustic_noise_mitigation" = "1"
register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8"