mb/google: Add GPU panel settings for SKL/KBL boards
The values are generated from the respective VBTs. Change-Id: Ic74e9dac898c17ce64a94b06682997a39daeff69 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/30247 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Thomas Heijligen <src@posteo.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
1a65017a50
commit
55c5777170
|
@ -1,5 +1,13 @@
|
|||
chip soc/intel/skylake
|
||||
|
||||
register "gpu_pp_up_delay_ms" = "100"
|
||||
register "gpu_pp_down_delay_ms" = "500"
|
||||
register "gpu_pp_cycle_delay_ms" = "500"
|
||||
register "gpu_pp_backlight_on_delay_ms" = " 1"
|
||||
register "gpu_pp_backlight_off_delay_ms" = "200"
|
||||
|
||||
register "gpu_pch_backlight_pwm_hz" = "1000"
|
||||
|
||||
# Enable deep Sx states
|
||||
register "deep_s3_enable_ac" = "0"
|
||||
register "deep_s3_enable_dc" = "1"
|
||||
|
|
|
@ -1,5 +1,13 @@
|
|||
chip soc/intel/skylake
|
||||
|
||||
register "gpu_pp_up_delay_ms" = "200"
|
||||
register "gpu_pp_down_delay_ms" = " 50"
|
||||
register "gpu_pp_cycle_delay_ms" = "500"
|
||||
register "gpu_pp_backlight_on_delay_ms" = " 1"
|
||||
register "gpu_pp_backlight_off_delay_ms" = "200"
|
||||
|
||||
register "gpu_pch_backlight_pwm_hz" = "200"
|
||||
|
||||
# Deep Sx states
|
||||
register "deep_s3_enable_ac" = "0"
|
||||
register "deep_s3_enable_dc" = "0"
|
||||
|
|
|
@ -1,5 +1,13 @@
|
|||
chip soc/intel/skylake
|
||||
|
||||
register "gpu_pp_up_delay_ms" = "200"
|
||||
register "gpu_pp_down_delay_ms" = " 50"
|
||||
register "gpu_pp_cycle_delay_ms" = "500"
|
||||
register "gpu_pp_backlight_on_delay_ms" = " 1"
|
||||
register "gpu_pp_backlight_off_delay_ms" = "200"
|
||||
|
||||
register "gpu_pch_backlight_pwm_hz" = "1000"
|
||||
|
||||
# Enable deep Sx states
|
||||
register "deep_s3_enable_ac" = "0"
|
||||
register "deep_s3_enable_dc" = "0"
|
||||
|
|
|
@ -1,5 +1,13 @@
|
|||
chip soc/intel/skylake
|
||||
|
||||
register "gpu_pp_up_delay_ms" = "200"
|
||||
register "gpu_pp_down_delay_ms" = " 50"
|
||||
register "gpu_pp_cycle_delay_ms" = "500"
|
||||
register "gpu_pp_backlight_on_delay_ms" = " 1"
|
||||
register "gpu_pp_backlight_off_delay_ms" = "200"
|
||||
|
||||
register "gpu_pch_backlight_pwm_hz" = "1000"
|
||||
|
||||
# Enable deep Sx states
|
||||
register "deep_s3_enable_ac" = "0"
|
||||
register "deep_s3_enable_dc" = "0"
|
||||
|
|
|
@ -1,5 +1,13 @@
|
|||
chip soc/intel/skylake
|
||||
|
||||
register "gpu_pp_up_delay_ms" = "200"
|
||||
register "gpu_pp_down_delay_ms" = " 50"
|
||||
register "gpu_pp_cycle_delay_ms" = "500"
|
||||
register "gpu_pp_backlight_on_delay_ms" = " 1"
|
||||
register "gpu_pp_backlight_off_delay_ms" = "200"
|
||||
|
||||
register "gpu_pch_backlight_pwm_hz" = "1000"
|
||||
|
||||
# Enable deep Sx states
|
||||
register "deep_s3_enable_ac" = "0"
|
||||
register "deep_s3_enable_dc" = "0"
|
||||
|
|
|
@ -1,5 +1,13 @@
|
|||
chip soc/intel/skylake
|
||||
|
||||
register "gpu_pp_up_delay_ms" = "200"
|
||||
register "gpu_pp_down_delay_ms" = " 50"
|
||||
register "gpu_pp_cycle_delay_ms" = "500"
|
||||
register "gpu_pp_backlight_on_delay_ms" = " 1"
|
||||
register "gpu_pp_backlight_off_delay_ms" = "200"
|
||||
|
||||
register "gpu_pch_backlight_pwm_hz" = "1000"
|
||||
|
||||
# Enable deep Sx states
|
||||
register "deep_s3_enable_ac" = "0"
|
||||
register "deep_s3_enable_dc" = "0"
|
||||
|
|
|
@ -1,5 +1,13 @@
|
|||
chip soc/intel/skylake
|
||||
|
||||
register "gpu_pp_up_delay_ms" = "200"
|
||||
register "gpu_pp_down_delay_ms" = " 50"
|
||||
register "gpu_pp_cycle_delay_ms" = "500"
|
||||
register "gpu_pp_backlight_on_delay_ms" = " 1"
|
||||
register "gpu_pp_backlight_off_delay_ms" = "200"
|
||||
|
||||
register "gpu_pch_backlight_pwm_hz" = "1000"
|
||||
|
||||
# Enable deep Sx states
|
||||
register "deep_s3_enable_ac" = "0"
|
||||
register "deep_s3_enable_dc" = "0"
|
||||
|
|
|
@ -1,5 +1,13 @@
|
|||
chip soc/intel/skylake
|
||||
|
||||
register "gpu_pp_up_delay_ms" = "200"
|
||||
register "gpu_pp_down_delay_ms" = " 50"
|
||||
register "gpu_pp_cycle_delay_ms" = "500"
|
||||
register "gpu_pp_backlight_on_delay_ms" = " 1"
|
||||
register "gpu_pp_backlight_off_delay_ms" = "200"
|
||||
|
||||
register "gpu_pch_backlight_pwm_hz" = "1000"
|
||||
|
||||
# Enable deep Sx states
|
||||
register "deep_s5_enable_ac" = "1"
|
||||
register "deep_s5_enable_dc" = "1"
|
||||
|
|
|
@ -1,5 +1,13 @@
|
|||
chip soc/intel/skylake
|
||||
|
||||
register "gpu_pp_up_delay_ms" = "200"
|
||||
register "gpu_pp_down_delay_ms" = " 50"
|
||||
register "gpu_pp_cycle_delay_ms" = "500"
|
||||
register "gpu_pp_backlight_on_delay_ms" = " 1"
|
||||
register "gpu_pp_backlight_off_delay_ms" = "200"
|
||||
|
||||
register "gpu_pch_backlight_pwm_hz" = "1000"
|
||||
|
||||
# Enable deep Sx states
|
||||
register "deep_s3_enable_ac" = "0"
|
||||
register "deep_s3_enable_dc" = "0"
|
||||
|
|
Loading…
Reference in New Issue