Remove unnecessary ENV_RAMSTAGE guard

TEST=Able to build coreboot for CML.

Change-Id: Ic0f473e04ffc1de50dee871af52eacf0b328b376
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32764
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2019-05-13 12:49:16 +05:30
parent 795fda0336
commit 55cb5f8de5
5 changed files with 0 additions and 10 deletions

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@ -838,14 +838,12 @@ void acpi_create_ivrs(acpi_ivrs_t *ivrs,
unsigned long (*acpi_fill_ivrs)(acpi_ivrs_t *ivrs_struct, unsigned long (*acpi_fill_ivrs)(acpi_ivrs_t *ivrs_struct,
unsigned long current)); unsigned long current));
#if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__)
void acpi_create_hpet(acpi_hpet_t *hpet); void acpi_create_hpet(acpi_hpet_t *hpet);
unsigned long acpi_write_hpet(struct device *device, unsigned long start, unsigned long acpi_write_hpet(struct device *device, unsigned long start,
acpi_rsdp_t *rsdp); acpi_rsdp_t *rsdp);
/* cpu/intel/speedstep/acpi.c */ /* cpu/intel/speedstep/acpi.c */
void generate_cpu_entries(struct device *device); void generate_cpu_entries(struct device *device);
#endif
void acpi_create_mcfg(acpi_mcfg_t *mcfg); void acpi_create_mcfg(acpi_mcfg_t *mcfg);

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@ -44,7 +44,6 @@ void __weak mainboard_post(uint8_t value)
DECLARE_SPIN_LOCK(cmos_post_lock) DECLARE_SPIN_LOCK(cmos_post_lock)
#if ENV_RAMSTAGE
void cmos_post_log(void) void cmos_post_log(void)
{ {
u8 code = 0; u8 code = 0;
@ -125,7 +124,6 @@ void post_log_clear(void)
post_log_extra(0); post_log_extra(0);
} }
#endif /* CONFIG_CMOS_POST_EXTRA */ #endif /* CONFIG_CMOS_POST_EXTRA */
#endif /* ENV_RAMSTAGE */
static void cmos_post_code(u8 value) static void cmos_post_code(u8 value)
{ {

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@ -124,7 +124,6 @@ void uart_tx_flush(int idx)
uart8250_tx_flush(uart_platform_base(idx)); uart8250_tx_flush(uart_platform_base(idx));
} }
#if ENV_RAMSTAGE
void uart_fill_lb(void *data) void uart_fill_lb(void *data)
{ {
struct lb_serial serial; struct lb_serial serial;
@ -138,4 +137,3 @@ void uart_fill_lb(void *data)
lb_add_console(LB_TAG_CONSOLE_SERIAL8250, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250, data);
} }
#endif

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@ -147,7 +147,6 @@ void uart_tx_flush(int idx)
uart8250_mem_tx_flush(base); uart8250_mem_tx_flush(base);
} }
#if ENV_RAMSTAGE
void uart_fill_lb(void *data) void uart_fill_lb(void *data)
{ {
struct lb_serial serial; struct lb_serial serial;
@ -166,4 +165,3 @@ void uart_fill_lb(void *data)
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
} }
#endif

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@ -17,7 +17,6 @@
#include <bootmode.h> #include <bootmode.h>
#include <vendorcode/google/chromeos/chromeos.h> #include <vendorcode/google/chromeos/chromeos.h>
#if ENV_RAMSTAGE
static int gfx_init_done = -1; static int gfx_init_done = -1;
int gfx_get_init_done(void) int gfx_get_init_done(void)
@ -31,7 +30,6 @@ void gfx_set_init_done(int done)
{ {
gfx_init_done = done; gfx_init_done = done;
} }
#endif
int display_init_required(void) int display_init_required(void)
{ {