Remove unnecessary ENV_RAMSTAGE guard
TEST=Able to build coreboot for CML. Change-Id: Ic0f473e04ffc1de50dee871af52eacf0b328b376 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32764 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -838,14 +838,12 @@ void acpi_create_ivrs(acpi_ivrs_t *ivrs,
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unsigned long (*acpi_fill_ivrs)(acpi_ivrs_t *ivrs_struct,
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unsigned long current));
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#if ENV_RAMSTAGE && !defined(__SIMPLE_DEVICE__)
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void acpi_create_hpet(acpi_hpet_t *hpet);
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unsigned long acpi_write_hpet(struct device *device, unsigned long start,
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acpi_rsdp_t *rsdp);
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/* cpu/intel/speedstep/acpi.c */
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void generate_cpu_entries(struct device *device);
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#endif
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void acpi_create_mcfg(acpi_mcfg_t *mcfg);
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@ -44,7 +44,6 @@ void __weak mainboard_post(uint8_t value)
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DECLARE_SPIN_LOCK(cmos_post_lock)
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#if ENV_RAMSTAGE
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void cmos_post_log(void)
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{
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u8 code = 0;
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@ -125,7 +124,6 @@ void post_log_clear(void)
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post_log_extra(0);
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}
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#endif /* CONFIG_CMOS_POST_EXTRA */
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#endif /* ENV_RAMSTAGE */
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static void cmos_post_code(u8 value)
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{
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@ -124,7 +124,6 @@ void uart_tx_flush(int idx)
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uart8250_tx_flush(uart_platform_base(idx));
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}
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#if ENV_RAMSTAGE
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void uart_fill_lb(void *data)
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{
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struct lb_serial serial;
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@ -138,4 +137,3 @@ void uart_fill_lb(void *data)
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lb_add_console(LB_TAG_CONSOLE_SERIAL8250, data);
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}
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#endif
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@ -147,7 +147,6 @@ void uart_tx_flush(int idx)
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uart8250_mem_tx_flush(base);
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}
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#if ENV_RAMSTAGE
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void uart_fill_lb(void *data)
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{
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struct lb_serial serial;
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@ -166,4 +165,3 @@ void uart_fill_lb(void *data)
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lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
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}
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#endif
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@ -17,7 +17,6 @@
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#include <bootmode.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#if ENV_RAMSTAGE
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static int gfx_init_done = -1;
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int gfx_get_init_done(void)
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@ -31,7 +30,6 @@ void gfx_set_init_done(int done)
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{
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gfx_init_done = done;
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}
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#endif
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int display_init_required(void)
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{
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