Allow per-board setting of HT clock and width so
less than optimal PCB designs can still work reliably with reduced clock. Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5179 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Timothy Pearson
Patrick Georgi
parent
72f75b1c8b
commit
55cf7bcbeb
72
src/Kconfig
72
src/Kconfig
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@ -56,6 +56,78 @@ menu "Chipset"
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comment "CPU"
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source src/cpu/Kconfig
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comment "Northbridge"
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menu "HyperTransport Setup"
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depends on (NORTHBRIDGE_AMD_AMDK8 || NORTHBRIDGE_AMD_AMDFAM10) && EXPERT
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choice
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prompt "HyperTransport Frequency"
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default LIMIT_HT_SPEED_AUTO
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help
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This option sets the maximum permissible HyperTransport link frequency.
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Use of this option will only limit the autodetected HT frequency; it will not (and cannot) increase the frequency beyond the autodetected limits.
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This is primarily used to work around poorly designed or laid out HT traces on certain motherboards.
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config LIMIT_HT_SPEED_200
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bool "Limit HT frequency to 200MHz"
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config LIMIT_HT_SPEED_400
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bool "Limit HT frequency to 400MHz"
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config LIMIT_HT_SPEED_600
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bool "Limit HT frequency to 600MHz"
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config LIMIT_HT_SPEED_800
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bool "Limit HT frequency to 800MHz"
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config LIMIT_HT_SPEED_1000
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bool "Limit HT frequency to 1.0GHz"
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config LIMIT_HT_SPEED_1200
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bool "Limit HT frequency to 1.2GHz"
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config LIMIT_HT_SPEED_1400
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bool "Limit HT frequency to 1.4GHz"
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config LIMIT_HT_SPEED_1600
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bool "Limit HT frequency to 1.6GHz"
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config LIMIT_HT_SPEED_1800
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bool "Limit HT frequency to 1.6GHz"
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config LIMIT_HT_SPEED_2000
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bool "Limit HT frequency to 2.0GHz"
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config LIMIT_HT_SPEED_2200
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bool "Limit HT frequency to 2.2GHz"
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config LIMIT_HT_SPEED_2400
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bool "Limit HT frequency to 2.4GHz"
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config LIMIT_HT_SPEED_2600
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bool "Limit HT frequency to 2.6GHz"
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config LIMIT_HT_SPEED_AUTO
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bool "Autodetect HT frequency"
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endchoice
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choice
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prompt "HyperTransport Downlink Width"
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default LIMIT_HT_DOWN_WIDTH_16
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help
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This option sets the maximum permissible HyperTransport link width.
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Use of this option will only limit the autodetected HT width; it will not (and cannot) increase the width beyond the autodetected limits.
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This is primarily used to work around poorly designed or laid out HT traces on certain motherboards.
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config LIMIT_HT_DOWN_WIDTH_8
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bool "8 bits"
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config LIMIT_HT_DOWN_WIDTH_16
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bool "16 bits"
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endchoice
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choice
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prompt "HyperTransport Uplink Width"
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default LIMIT_HT_UP_WIDTH_16
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help
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This option sets the maximum permissible HyperTransport link width.
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Use of this option will only limit the autodetected HT width; it will not (and cannot) increase the width beyond the autodetected limits.
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This is primarily used to work around poorly designed or laid out HT traces on certain motherboards.
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config LIMIT_HT_UP_WIDTH_8
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bool "8 bits"
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config LIMIT_HT_UP_WIDTH_16
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bool "16 bits"
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endchoice
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endmenu
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source src/northbridge/Kconfig
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comment "Southbridge"
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source src/southbridge/Kconfig
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@ -1327,9 +1327,51 @@ void selectOptimalWidthAndFrequency(sMainData *pDat)
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for (i = 0; i < pDat->TotalLinks*2; i += 2)
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{
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cbPCBFreqLimit = 0xFFFF;
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#if CONFIG_LIMIT_HT_SPEED_200
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cbPCBFreqLimit = 0x0001;
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#elif CONFIG_LIMIT_HT_SPEED_300
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cbPCBFreqLimit = 0x0003;
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#elif CONFIG_LIMIT_HT_SPEED_400
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cbPCBFreqLimit = 0x0007;
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#elif CONFIG_LIMIT_HT_SPEED_500
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cbPCBFreqLimit = 0x000F;
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#elif CONFIG_LIMIT_HT_SPEED_600
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cbPCBFreqLimit = 0x001F;
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#elif CONFIG_LIMIT_HT_SPEED_800
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cbPCBFreqLimit = 0x003F;
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#elif CONFIG_LIMIT_HT_SPEED_1000
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cbPCBFreqLimit = 0x007F;
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#elif CONFIG_LIMIT_HT_SPEED_1200
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cbPCBFreqLimit = 0x00FF;
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#elif CONFIG_LIMIT_HT_SPEED_1400
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cbPCBFreqLimit = 0x01FF;
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#elif CONFIG_LIMIT_HT_SPEED_1600
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cbPCBFreqLimit = 0x03FF;
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#elif CONFIG_LIMIT_HT_SPEED_1800
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cbPCBFreqLimit = 0x07FF;
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#elif CONFIG_LIMIT_HT_SPEED_2000
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cbPCBFreqLimit = 0x0FFF;
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#elif CONFIG_LIMIT_HT_SPEED_2200
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cbPCBFreqLimit = 0x1FFF;
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#elif CONFIG_LIMIT_HT_SPEED_2400
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cbPCBFreqLimit = 0x3FFF;
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#elif CONFIG_LIMIT_HT_SPEED_2600
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cbPCBFreqLimit = 0x7FFF;
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#else
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cbPCBFreqLimit = 0xFFFF; // Maximum allowed by autoconfiguration
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#endif
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#if CONFIG_LIMIT_HT_DOWN_WIDTH_8
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cbPCBABDownstreamWidth = 8;
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#else
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cbPCBABDownstreamWidth = 16;
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#endif
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#if CONFIG_LIMIT_HT_UP_WIDTH_8
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cbPCBBAUpstreamWidth = 8;
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#else
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cbPCBBAUpstreamWidth = 16;
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#endif
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if ( (pDat->PortList[i].Type == PORTLIST_TYPE_CPU) && (pDat->PortList[i+1].Type == PORTLIST_TYPE_CPU))
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{
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