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soc/intel/icelake: Enable support for FSP 2.1 specification 

Remove FSP 2.0 support from ICL SoC and add FSP 2.1 support.

Change-Id: Ife0c133ddbf2e0fa14f94ffec15d11830cfaf7b3
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30158
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2018-12-19 16:50:57 +05:30 committed by Patrick Georgi
parent 8a83282795
commit 55fb6b4d0d
1 changed files with 1 additions and 2 deletions
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src/soc/intel/icelake/Kconfig
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@ -19,7 +19,6 @@ config CPU_SPECIFIC_OPTIONS
select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
select COMMON_FADT
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select FSP_USES_CB_STACK
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select INTEL_DESCRIPTOR_MODE_CAPABLE
@ -32,8 +31,8 @@ config CPU_SPECIFIC_OPTIONS
select MRC_SETTINGS_PROTECT
select PARALLEL_MP
select PARALLEL_MP_AP_WORK
select PLATFORM_USES_FSP2_0
select MICROCODE_BLOB_UNDISCLOSED
select PLATFORM_USES_FSP2_1
select POSTCAR_CONSOLE
select POSTCAR_STAGE
select REG_SCRIPT