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Move setup_uma_memory() to Agesa Family14 northbridge 

Following boards had identical code:
  amd/inagua
  amd/persimmon

The following had only whitespace or debug level changes
compared to ones above.
  amd/union_station
  amd/south_station
  asrock/e350m1

Change-Id: I11ee46e06e1dd510cba551166189ebcaa144464b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1208
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Kyösti Mälkki 2012-07-11 08:02:39 +03:00 committed by Patrick Georgi
parent d4821fc702
commit 55fff930ce
6 changed files with 48 additions and 195 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

39
src/mainboard/amd/inagua/mainboard.c
View File

@ -79,44 +79,7 @@ static void inagua_enable(device_t dev)
{ {
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
#if CONFIG_GFXUMA setup_uma_memory();
msr_t msr, msr2;
uint32_t sys_mem;
/* TOP_MEM: the top of DRAM below 4G */
msr = rdmsr(TOP_MEM);
printk
(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
__func__, msr.lo, msr.hi);
/* TOP_MEM2: the top of DRAM above 4G */
msr2 = rdmsr(TOP_MEM2);
printk
(BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
__func__, msr2.lo, msr2.hi);
/* refer to UMA Size Consideration in Family14h BKDG. */
sys_mem = msr.lo + 0x1000000; // Ignore 16MB allocated for C6 when finding UMA size, refer MemNGetUmaSizeON()
if ((msr.hi & 0x0000000F) || (sys_mem >= 0x80000000)) {
uma_memory_size = 0x18000000; /* >= 2G memory, 384M recommended UMA */
}
else {
if (sys_mem >= 0x40000000) {
uma_memory_size = 0x10000000; /* >= 1G memory, 256M recommended UMA */
} else {
uma_memory_size = 0x4000000; /* <1G memory, 64M recommended UMA */
}
}
uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
__func__, uma_memory_size, uma_memory_base);
/* TODO: TOP_MEM2 */
#else
uma_memory_size = 0x10000000; /* 256M recommended UMA */
uma_memory_base = 0x30000000; /* 1GB system memory supported */
#endif
/* Inagua mainboard specific setting */ /* Inagua mainboard specific setting */
set_pcie_dereset(); set_pcie_dereset();

39
src/mainboard/amd/persimmon/mainboard.c
View File

@ -66,44 +66,7 @@ static void persimmon_enable(device_t dev)
acpi_slp_type = acpi_get_sleep_type(); acpi_slp_type = acpi_get_sleep_type();
#endif #endif
#if CONFIG_GFXUMA setup_uma_memory();
msr_t msr, msr2;
uint32_t sys_mem;
/* TOP_MEM: the top of DRAM below 4G */
msr = rdmsr(TOP_MEM);
printk
(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
__func__, msr.lo, msr.hi);
/* TOP_MEM2: the top of DRAM above 4G */
msr2 = rdmsr(TOP_MEM2);
printk
(BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
__func__, msr2.lo, msr2.hi);
/* refer to UMA Size Consideration in Family14h BKDG. */
sys_mem = msr.lo + 0x1000000; // Ignore 16MB allocated for C6 when finding UMA size, refer MemNGetUmaSizeON()
if ((msr.hi & 0x0000000F) || (sys_mem >= 0x80000000)) {
uma_memory_size = 0x18000000; /* >= 2G memory, 384M recommended UMA */
}
else {
if (sys_mem >= 0x40000000) {
uma_memory_size = 0x10000000; /* >= 1G memory, 256M recommended UMA */
} else {
uma_memory_size = 0x4000000; /* <1G memory, 64M recommended UMA */
}
}
uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
__func__, uma_memory_size, uma_memory_base);
/* TODO: TOP_MEM2 */
#else
uma_memory_size = 0x10000000; /* 256M recommended UMA */
uma_memory_base = 0x30000000; /* 1GB system memory supported */
#endif
} }

40
src/mainboard/amd/south_station/mainboard.c
View File

@ -80,46 +80,8 @@ static void southstation_led_init(void)
static void southstation_enable(device_t dev) static void southstation_enable(device_t dev)
{ {
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
setup_uma_memory();
#if CONFIG_GFXUMA
msr_t msr, msr2;
uint32_t sys_mem;
/* TOP_MEM: the top of DRAM below 4G */
msr = rdmsr(TOP_MEM);
printk
(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
__func__, msr.lo, msr.hi);
/* TOP_MEM2: the top of DRAM above 4G */
msr2 = rdmsr(TOP_MEM2);
printk
(BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
__func__, msr2.lo, msr2.hi);
/* refer to UMA Size Consideration in Family14h BKDG. */
sys_mem = msr.lo + 0x1000000; // Ignore 16MB allocated for C6 when finding UMA size, refer MemNGetUmaSizeON()
if ((msr.hi & 0x0000000F) || (sys_mem >= 0x80000000)) {
uma_memory_size = 0x18000000; /* >= 2G memory, 384M recommended UMA */
}
else {
if (sys_mem >= 0x40000000) {
uma_memory_size = 0x10000000; /* >= 1G memory, 256M recommended UMA */
}
else {
uma_memory_size = 0x4000000; /* <1G memory, 64M recommended UMA */
}
}
uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
__func__, uma_memory_size, uma_memory_base);
/* TODO: TOP_MEM2 */
#else
uma_memory_size = 0x10000000; /* 256M recommended UMA */
uma_memory_base = 0x30000000; /* 1GB system memory supported */
#endif
southstation_led_init(); southstation_led_init();
} }

41
src/mainboard/amd/union_station/mainboard.c
View File

@ -55,46 +55,7 @@ static void unionstation_enable(device_t dev)
{ {
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
#if CONFIG_GFXUMA setup_uma_memory();
msr_t msr, msr2;
uint32_t sys_mem;
/* TOP_MEM: the top of DRAM below 4G */
msr = rdmsr(TOP_MEM);
printk
(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
__func__, msr.lo, msr.hi);
/* TOP_MEM2: the top of DRAM above 4G */
msr2 = rdmsr(TOP_MEM2);
printk
(BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
__func__, msr2.lo, msr2.hi);
/* refer to UMA Size Consideration in Family14h BKDG. */
sys_mem = msr.lo + 0x1000000; // Ignore 16MB allocated for C6 when finding UMA size, refer MemNGetUmaSizeON()
if ((msr.hi & 0x0000000F) || (sys_mem >= 0x80000000)) {
uma_memory_size = 0x18000000; /* >= 2G memory, 384M recommended UMA */
}
else {
if (sys_mem >= 0x40000000) {
uma_memory_size = 0x10000000; /* >= 1G memory, 256M recommended UMA */
}
else {
uma_memory_size = 0x4000000; /* <1G memory, 64M recommended UMA */
}
}
uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
__func__, uma_memory_size, uma_memory_base);
/* TODO: TOP_MEM2 */
#else
uma_memory_size = 0x10000000; /* 256M recommended UMA */
uma_memory_base = 0x30000000; /* 1GB system memory supported */
#endif
} }
int add_mainboard_resources(struct lb_memory *mem) int add_mainboard_resources(struct lb_memory *mem)

41
src/mainboard/asrock/e350m1/mainboard.c
View File

@ -53,46 +53,7 @@ void set_pcie_dereset(void)
static void e350m1_enable(device_t dev) static void e350m1_enable(device_t dev)
{ {
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
#if CONFIG_GFXUMA setup_uma_memory();
msr_t msr, msr2;
uint32_t sys_mem;
/* TOP_MEM: the top of DRAM below 4G */
msr = rdmsr(TOP_MEM);
printk
(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
__func__, msr.lo, msr.hi);
/* TOP_MEM2: the top of DRAM above 4G */
msr2 = rdmsr(TOP_MEM2);
printk
(BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
__func__, msr2.lo, msr2.hi);
/* refer to UMA Size Consideration in Family14h BKDG. */
sys_mem = msr.lo + 0x1000000; // Ignore 16MB allocated for C6 when finding UMA size, refer MemNGetUmaSizeON()
if ((msr.hi & 0x0000000F) || (sys_mem >= 0x80000000)) {
uma_memory_size = 0x18000000; /* >= 2G memory, 384M recommended UMA */
}
else {
if (sys_mem >= 0x40000000) {
uma_memory_size = 0x10000000; /* >= 1G memory, 256M recommended UMA */
}
else {
uma_memory_size = 0x4000000; /* <1G memory, 64M recommended UMA */
}
}
uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
__func__, uma_memory_size, uma_memory_base);
/* TODO: TOP_MEM2 */
#else
uma_memory_size = 0x10000000; /* 256M recommended UMA */
uma_memory_base = 0x30000000; /* 1GB system memory supported */
#endif
} }
int add_mainboard_resources(struct lb_memory *mem) int add_mainboard_resources(struct lb_memory *mem)

43
src/northbridge/amd/agesa/family14/northbridge.c
View File

@ -31,6 +31,7 @@
#include <cbmem.h> #include <cbmem.h>
#include <cpu/x86/lapic.h> #include <cpu/x86/lapic.h>
#include <cpu/amd/mtrr.h>
#include "agesawrapper.h" #include "agesawrapper.h"
#include "chip.h" #include "chip.h"
@ -516,6 +517,48 @@ static void domain_read_resources(device_t dev)
#endif #endif
} }
void setup_uma_memory(void)
{
#if CONFIG_GFXUMA
msr_t msr, msr2;
uint32_t sys_mem;
/* TOP_MEM: the top of DRAM below 4G */
msr = rdmsr(TOP_MEM);
printk
(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
__func__, msr.lo, msr.hi);
/* TOP_MEM2: the top of DRAM above 4G */
msr2 = rdmsr(TOP_MEM2);
printk
(BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
__func__, msr2.lo, msr2.hi);
/* refer to UMA Size Consideration in Family14h BKDG. */
sys_mem = msr.lo + 0x1000000; // Ignore 16MB allocated for C6 when finding UMA size, refer MemNGetUmaSizeON()
if ((msr.hi & 0x0000000F) || (sys_mem >= 0x80000000)) {
uma_memory_size = 0x18000000; /* >= 2G memory, 384M recommended UMA */
}
else {
if (sys_mem >= 0x40000000) {
uma_memory_size = 0x10000000; /* >= 1G memory, 256M recommended UMA */
} else {
uma_memory_size = 0x4000000; /* <1G memory, 64M recommended UMA */
}
}
uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
__func__, uma_memory_size, uma_memory_base);
/* TODO: TOP_MEM2 */
#else
uma_memory_size = 0x10000000; /* 256M recommended UMA */
uma_memory_base = 0x30000000; /* 1GB system memory supported */
#endif
}
static void domain_set_resources(device_t dev) static void domain_set_resources(device_t dev)
{ {
printk(BIOS_DEBUG, "\nFam14h - domain_set_resources.\n"); printk(BIOS_DEBUG, "\nFam14h - domain_set_resources.\n");