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mb/google/zork: Assume VBOOT_STARTS_BEFORE_BOOTBLOCK 

At this point, the zork platform will only use psp_verstage, so remove
the VBOOT_STARTS_IN_BOOTBLOCK option and set code for VBOOT_STARTS-
BEFORE_BOOTBLOCK to always be used.

TEST=Build & Boot Morphius
BRANCH=Zork
BUG=b:172848137

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I30d90fe82c37966a860b52c07a3550dcecf8d19d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47529
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Martin Roth 2020-11-12 10:33:43 -07:00 committed by Felix Held
parent 5014373edd
commit 560c11ec65
4 changed files with 3 additions and 29 deletions
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21
src/mainboard/google/zork/Kconfig
View File

@ -105,6 +105,7 @@ config ONBOARD_VGA_IS_PRIMARY
config VBOOT
select EC_GOOGLE_CHROMEEC_SWITCHES
select VBOOT_LID_SWITCH
select VBOOT_STARTS_BEFORE_BOOTBLOCK
config VBOOT_VBNV_OFFSET
hex
@ -129,7 +130,7 @@ config DRIVER_TPM_I2C_ADDR
config PICASSO_FW_A_POSITION
hex
default 0xFF012040
depends on VBOOT_SLOTS_RW_AB && VBOOT_STARTS_BEFORE_BOOTBLOCK
depends on VBOOT_SLOTS_RW_AB
help
Location of the AMD firmware in the RW_A region. This is the
start of the RW-A region + 64 bytes for the cbfs header.
@ -137,7 +138,7 @@ config PICASSO_FW_A_POSITION
config PICASSO_FW_B_POSITION
hex
default 0xFF312040
depends on VBOOT_SLOTS_RW_AB && VBOOT_STARTS_BEFORE_BOOTBLOCK
depends on VBOOT_SLOTS_RW_AB
help
Location of the AMD firmware in the RW_B region. This is the
start of the RW-A region + 64 bytes for the cbfs header.
@ -241,22 +242,6 @@ config VARIANT_MAX_BOARD_ID_BROKEN_FMPCU_POWER
help
Last board version that needs the extra delay for FPMCU init.
config VBOOT_STARTS_BEFORE_BOOTBLOCK
bool "PSP verstage"
default y if VBOOT
help
Firmware verification happens before the main processor is brought
online.
config VBOOT_STARTS_IN_BOOTBLOCK
bool "X86 verstage (in bootblock)"
depends on VBOOT && ! VBOOT_STARTS_BEFORE_BOOTBLOCK
select VBOOT_SEPARATE_VERSTAGE
help
Firmware verification happens during the end of or right after the
bootblock. This implies that a static VBOOT2_WORK() buffer must be
allocated in memlayout.
config EFS_SPI_READ_MODE
int
default 0 if EM100 # Normal read mode

4
src/mainboard/google/zork/Makefile.inc
View File

@ -9,11 +9,7 @@ ramstage-y += chromeos.c
ramstage-y += ec.c
ramstage-y += sku_id.c
ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y)
verstage-y += verstage.c
else
verstage-y += chromeos.c
endif
smm-y += smihandler.c

5
src/mainboard/google/zork/bootblock.c
View File

@ -12,10 +12,5 @@ void bootblock_mainboard_early_init(void)
gpios = variant_bootblock_gpio_table(&num_gpios, acpi_get_sleep_type());
program_gpios(gpios, num_gpios);
if (!CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)) {
gpios = variant_early_gpio_table(&num_gpios);
program_gpios(gpios, num_gpios);
}
variant_pcie_gpio_configure();
}

2
src/mainboard/google/zork/variants/baseboard/Makefile.inc
View File

@ -7,10 +7,8 @@ bootblock-$(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ) += gpio_baseboard_dalboz.c
verstage-y += gpio_baseboard_common.c
verstage-y += helpers.c
ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y)
verstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE) += gpio_baseboard_trembyle.c
verstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ) += gpio_baseboard_dalboz.c
endif
verstage-y += tpm_tis.c
romstage-y += gpio_baseboard_common.c