trogdor: Add support for rev1
This patch implements the pin changes needed for Trogdor rev1. Unfortunately, coreboot has to get the EC and TPM SPI busses compiled into Kconfig, so we cannot really build a single image that runs on both revisions. Introduce a Kconfig to handle this instead. Change-Id: I2e48dc4565682c12089b6cf92c29f4cef4d61bb8 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38773 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -4,6 +4,9 @@ config BOARD_GOOGLE_TROGDOR_COMMON # Umbrella option to be selected by variants
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if BOARD_GOOGLE_TROGDOR_COMMON
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config TROGDOR_REV0
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def_bool y
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select BOARD_ROMSIZE_KB_8192
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@ -32,11 +35,13 @@ config MAINBOARD_DIR
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config DRIVER_TPM_SPI_BUS
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hex
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default 0x6
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default 0x6 if TROGDOR_REV0
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default 0x0
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config EC_GOOGLE_CHROMEEC_SPI_BUS
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hex
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default 0x0
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default 0x0 if TROGDOR_REV0
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default 0x6
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##########################################################
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#### Update below when adding a new derivative board. ####
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@ -3,6 +3,7 @@
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#ifndef _COREBOOT_SRC_MAINBOARD_GOOGLE_TROGDOR_BOARD_H_
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#define _COREBOOT_SRC_MAINBOARD_GOOGLE_TROGDOR_BOARD_H_
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#include <boardid.h>
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#include <gpio.h>
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#include <soc/gpio.h>
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@ -2,12 +2,11 @@
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#include <bootblock_common.h>
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#include "board.h"
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#include <soc/qcom_qup_se.h>
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#include <soc/qupv3_spi.h>
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void bootblock_mainboard_init(void)
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{
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setup_chromeos_gpios();
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qup_spi_init(QUPV3_1_SE0, 1010 * KHz); /* H1 SPI */
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qup_spi_init(QUPV3_0_SE0, 1010 * KHz); /* EC SPI */
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qup_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, 1010 * KHz);
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qup_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, 1010 * KHz);
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}
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