soc/amd/picasso: Set vboot hashing block size to 36k

On picasso's psp_verstage, the vboot hash is being calculated by
hardware using relatively expensive system calls.  By increasing the
block size, we can save roughly 150ms of boot and S3 resume time.

TEST=Build & boot see that boot time has decreased.
BRANCH=Zork
BUG=b:169217270 - Zork: SHA calculation in vboot takes too long

Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: I6642073357327811b415dcbcad6930ac6d2598f9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46903
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Martin Roth 2020-10-28 11:52:30 -06:00 committed by Felix Held
parent 03d06d3bcd
commit 5632c6bc02
1 changed files with 16 additions and 0 deletions

View File

@ -535,6 +535,22 @@ config VBOOT_STARTS_BEFORE_BOOTBLOCK
Runs verstage on the PSP. Only available on
certain Chrome OS branded parts from AMD.
config VBOOT_HASH_BLOCK_SIZE
hex
default 0x9000
depends on VBOOT_STARTS_BEFORE_BOOTBLOCK
help
Because the bulk of the time in psp_verstage to hash the RO cbfs is
spent in the overhead of doing svc calls, increasing the hash block
size significantly cuts the verstage hashing time as seen below.
4k takes 180ms
16k takes 44ms
32k takes 33.7ms
36k takes 32.5ms
There's actually still room for an even bigger stack, but we've
reached a point of diminishing returns.
config CMOS_RECOVERY_BYTE
hex
default 0x51