soc/amd/picasso: Set vboot hashing block size to 36k
On picasso's psp_verstage, the vboot hash is being calculated by hardware using relatively expensive system calls. By increasing the block size, we can save roughly 150ms of boot and S3 resume time. TEST=Build & boot see that boot time has decreased. BRANCH=Zork BUG=b:169217270 - Zork: SHA calculation in vboot takes too long Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I6642073357327811b415dcbcad6930ac6d2598f9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/46903 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Kangheui Won <khwon@chromium.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -535,6 +535,22 @@ config VBOOT_STARTS_BEFORE_BOOTBLOCK
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Runs verstage on the PSP. Only available on
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Runs verstage on the PSP. Only available on
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certain Chrome OS branded parts from AMD.
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certain Chrome OS branded parts from AMD.
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config VBOOT_HASH_BLOCK_SIZE
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hex
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default 0x9000
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depends on VBOOT_STARTS_BEFORE_BOOTBLOCK
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help
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Because the bulk of the time in psp_verstage to hash the RO cbfs is
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spent in the overhead of doing svc calls, increasing the hash block
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size significantly cuts the verstage hashing time as seen below.
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4k takes 180ms
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16k takes 44ms
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32k takes 33.7ms
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36k takes 32.5ms
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There's actually still room for an even bigger stack, but we've
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reached a point of diminishing returns.
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config CMOS_RECOVERY_BYTE
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config CMOS_RECOVERY_BYTE
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hex
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hex
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default 0x51
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default 0x51
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